Home
last modified time | relevance | path

Searched refs:mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h6524 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX … macro
H A Dgc_10_1_0_offset.h9630 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX … macro
H A Dgc_10_3_0_offset.h9468 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX … macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h6524 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX … macro
H A Dgc_10_1_0_offset.h9630 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX … macro
H A Dgc_10_3_0_offset.h9468 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX … macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h6524 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX … macro
H A Dgc_10_1_0_offset.h9630 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX … macro
H A Dgc_10_3_0_offset.h9468 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_BASE_IDX … macro