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Searched refs:mmRLC_LB_CNTL (Results 1 – 25 of 43) sorted by relevance

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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dsi.c111 mmRLC_LB_CNTL, 0xffffffff, 0x800000f4,
158 mmRLC_LB_CNTL, 0xffffffff, 0x800000a4,
295 mmRLC_LB_CNTL, 0xffffffff, 0x80010014,
380 mmRLC_LB_CNTL, 0xffffffff, 0x800000f4,
H A Dgfx_v7_0.c3357 tmp = RREG32(mmRLC_LB_CNTL); in gfx_v7_0_enable_lbpw()
3362 WREG32(mmRLC_LB_CNTL, tmp); in gfx_v7_0_enable_lbpw()
3549 WREG32(mmRLC_LB_CNTL, 0x80000004); in gfx_v7_0_rlc_resume()
H A Dgfx_v9_0.c1862 WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data); in gfx_v9_0_init_lbpw()
1911 WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data); in gfx_v9_4_init_lbpw()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dsi.c111 mmRLC_LB_CNTL, 0xffffffff, 0x800000f4,
158 mmRLC_LB_CNTL, 0xffffffff, 0x800000a4,
295 mmRLC_LB_CNTL, 0xffffffff, 0x80010014,
380 mmRLC_LB_CNTL, 0xffffffff, 0x800000f4,
H A Dgfx_v7_0.c3357 tmp = RREG32(mmRLC_LB_CNTL); in gfx_v7_0_enable_lbpw()
3362 WREG32(mmRLC_LB_CNTL, tmp); in gfx_v7_0_enable_lbpw()
3549 WREG32(mmRLC_LB_CNTL, 0x80000004); in gfx_v7_0_rlc_resume()
H A Dgfx_v9_0.c1862 WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data); in gfx_v9_0_init_lbpw()
1911 WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data); in gfx_v9_4_init_lbpw()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dsi.c111 mmRLC_LB_CNTL, 0xffffffff, 0x800000f4,
158 mmRLC_LB_CNTL, 0xffffffff, 0x800000a4,
295 mmRLC_LB_CNTL, 0xffffffff, 0x80010014,
380 mmRLC_LB_CNTL, 0xffffffff, 0x800000f4,
H A Dgfx_v7_0.c3357 tmp = RREG32(mmRLC_LB_CNTL); in gfx_v7_0_enable_lbpw()
3362 WREG32(mmRLC_LB_CNTL, tmp); in gfx_v7_0_enable_lbpw()
3549 WREG32(mmRLC_LB_CNTL, 0x80000004); in gfx_v7_0_rlc_resume()
H A Dgfx_v9_0.c1862 WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data); in gfx_v9_0_init_lbpw()
1911 WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data); in gfx_v9_4_init_lbpw()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1148 #define mmRLC_LB_CNTL 0x30C3 macro
H A Dgfx_7_2_d.h1269 #define mmRLC_LB_CNTL 0x30d9 macro
H A Dgfx_7_0_d.h1256 #define mmRLC_LB_CNTL 0x30d9 macro
H A Dgfx_8_1_d.h1366 #define mmRLC_LB_CNTL 0xec19 macro
H A Dgfx_8_0_d.h1363 #define mmRLC_LB_CNTL 0xec19 macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1148 #define mmRLC_LB_CNTL 0x30C3 macro
H A Dgfx_7_2_d.h1269 #define mmRLC_LB_CNTL 0x30d9 macro
H A Dgfx_7_0_d.h1256 #define mmRLC_LB_CNTL 0x30d9 macro
H A Dgfx_8_0_d.h1363 #define mmRLC_LB_CNTL 0xec19 macro
H A Dgfx_8_1_d.h1366 #define mmRLC_LB_CNTL 0xec19 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1148 #define mmRLC_LB_CNTL 0x30C3 macro
H A Dgfx_7_0_d.h1256 #define mmRLC_LB_CNTL 0x30d9 macro
H A Dgfx_7_2_d.h1269 #define mmRLC_LB_CNTL 0x30d9 macro
H A Dgfx_8_0_d.h1363 #define mmRLC_LB_CNTL 0xec19 macro
H A Dgfx_8_1_d.h1366 #define mmRLC_LB_CNTL 0xec19 macro
/dports/sysutils/roct/ROCT-Thunk-Interface-9d1fb76/tests/kfdtest/include/asic_reg/
H A Dgfx_7_2_d.h1269 #define mmRLC_LB_CNTL 0x30d9 macro

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