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Searched refs:mmRLC_PG_DELAY_3 (Results 1 – 25 of 27) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h1447 #define mmRLC_PG_DELAY_3 0xec78 macro
H A Dgfx_8_1_d.h1443 #define mmRLC_PG_DELAY_3 0xec78 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h1443 #define mmRLC_PG_DELAY_3 0xec78 macro
H A Dgfx_8_0_d.h1447 #define mmRLC_PG_DELAY_3 0xec78 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h1447 #define mmRLC_PG_DELAY_3 0xec78 macro
H A Dgfx_8_1_d.h1443 #define mmRLC_PG_DELAY_3 0xec78 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c2911 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_3)); in gfx_v9_0_init_gfx_power_gating()
2914 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_3), data); in gfx_v9_0_init_gfx_power_gating()
H A Dgfx_v10_0.c7941 WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data); in gfx_v10_cntl_power_gating()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c2911 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_3)); in gfx_v9_0_init_gfx_power_gating()
2914 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_3), data); in gfx_v9_0_init_gfx_power_gating()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c2911 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_3)); in gfx_v9_0_init_gfx_power_gating()
2914 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_3), data); in gfx_v9_0_init_gfx_power_gating()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6125 #define mmRLC_PG_DELAY_3 macro
H A Dgc_9_1_offset.h6347 #define mmRLC_PG_DELAY_3 macro
H A Dgc_9_2_1_offset.h6325 #define mmRLC_PG_DELAY_3 macro
H A Dgc_10_1_0_offset.h9443 #define mmRLC_PG_DELAY_3 macro
H A Dgc_10_3_0_offset.h9275 #define mmRLC_PG_DELAY_3 macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6125 #define mmRLC_PG_DELAY_3 macro
H A Dgc_9_2_1_offset.h6325 #define mmRLC_PG_DELAY_3 macro
H A Dgc_9_1_offset.h6347 #define mmRLC_PG_DELAY_3 macro
H A Dgc_10_1_0_offset.h9443 #define mmRLC_PG_DELAY_3 macro
H A Dgc_10_3_0_offset.h9275 #define mmRLC_PG_DELAY_3 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6125 #define mmRLC_PG_DELAY_3 macro
H A Dgc_9_1_offset.h6347 #define mmRLC_PG_DELAY_3 macro
H A Dgc_9_2_1_offset.h6325 #define mmRLC_PG_DELAY_3 macro
H A Dgc_10_1_0_offset.h9443 #define mmRLC_PG_DELAY_3 macro
H A Dgc_10_3_0_offset.h9275 #define mmRLC_PG_DELAY_3 macro

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