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Searched refs:mmUVD_RBC_WPTR_POLL_CNTL (Results 1 – 12 of 12) sorted by relevance

/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h408 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
H A Dvcn_2_5_offset.h801 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
H A Dvcn_2_0_0_offset.h758 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
H A Dvcn_3_0_0_offset.h1187 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h408 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
H A Dvcn_2_5_offset.h801 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
H A Dvcn_2_0_0_offset.h758 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
H A Dvcn_3_0_0_offset.h1187 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h408 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
H A Dvcn_2_5_offset.h801 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
H A Dvcn_2_0_0_offset.h758 #define mmUVD_RBC_WPTR_POLL_CNTL … macro
H A Dvcn_3_0_0_offset.h1187 #define mmUVD_RBC_WPTR_POLL_CNTL … macro