| /dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | npu2-opencapi.c | 1657 uint64_t mm_win[2]; in setup_device() local
1660 phys_map_get(dev->npu->chip_id, NPU_OCAPI_MMIO, dev->brick_index, &mm_win[0], in setup_device()
1661 &mm_win[1]); in setup_device()
1663 mm_win[0], mm_win[1]); in setup_device()
1664 dn_phb = dt_new_addr(dt_root, "pciex", mm_win[0]); in setup_device()
1679 dt_add_property(dn_phb, "reg", mm_win, sizeof(mm_win)); in setup_device()
1685 dt_add_property(dn_phb, "ibm,mmio-window", mm_win, sizeof(mm_win)); in setup_device()
1696 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1697 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1698 hi32(mm_win[1]), lo32(mm_win[1])); in setup_device()
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| H A D | npu.c | 1024 struct dt_node *npu_dn, uint64_t mm_win[2], in assign_mmio_bars()
1086 mm_win[0] = bar.base + bar.size; in assign_mmio_bars()
1098 mm_win[1] = (bar.base + bar.size) - mm_win[0]; in assign_mmio_bars()
1115 uint64_t at_bar[2], mm_win[2]; in npu_probe_phb() local
1133 assign_mmio_bars(gcid, xscom, dn, mm_win, at_bar); in npu_probe_phb()
1152 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu_probe_phb()
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| H A D | npu2.c | 1461 static void assign_mmio_bars(uint64_t gcid, uint32_t scom, uint64_t reg[2], uint64_t mm_win[2]) in assign_mmio_bars()
1508 mm_win[0] = npu2_bars[3].base; in assign_mmio_bars()
1509 mm_win[1] = npu2_bars[ARRAY_SIZE(npu2_bars) - 1].base + in assign_mmio_bars()
1511 mm_win[0]; in assign_mmio_bars()
1521 uint64_t reg[2], mm_win[2], val, mask; in npu2_nvlink_init_npu() local
1606 assign_mmio_bars(npu->chip_id, npu->xscom_base, reg, mm_win); in npu2_nvlink_init_npu()
1608 npu->mm_base = mm_win[0]; in npu2_nvlink_init_npu()
1609 npu->mm_size = mm_win[1]; in npu2_nvlink_init_npu()
1632 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu2_nvlink_init_npu()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/ |
| H A D | npu2-opencapi.c | 1657 uint64_t mm_win[2]; in setup_device() local
1660 phys_map_get(dev->npu->chip_id, NPU_OCAPI_MMIO, dev->brick_index, &mm_win[0], in setup_device()
1661 &mm_win[1]); in setup_device()
1663 mm_win[0], mm_win[1]); in setup_device()
1664 dn_phb = dt_new_addr(dt_root, "pciex", mm_win[0]); in setup_device()
1679 dt_add_property(dn_phb, "reg", mm_win, sizeof(mm_win)); in setup_device()
1685 dt_add_property(dn_phb, "ibm,mmio-window", mm_win, sizeof(mm_win)); in setup_device()
1696 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1697 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1698 hi32(mm_win[1]), lo32(mm_win[1])); in setup_device()
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| H A D | npu.c | 1024 struct dt_node *npu_dn, uint64_t mm_win[2], in assign_mmio_bars()
1086 mm_win[0] = bar.base + bar.size; in assign_mmio_bars()
1098 mm_win[1] = (bar.base + bar.size) - mm_win[0]; in assign_mmio_bars()
1115 uint64_t at_bar[2], mm_win[2]; in npu_probe_phb() local
1133 assign_mmio_bars(gcid, xscom, dn, mm_win, at_bar); in npu_probe_phb()
1152 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu_probe_phb()
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| H A D | npu2.c | 1461 static void assign_mmio_bars(uint64_t gcid, uint32_t scom, uint64_t reg[2], uint64_t mm_win[2]) in assign_mmio_bars()
1508 mm_win[0] = npu2_bars[3].base; in assign_mmio_bars()
1509 mm_win[1] = npu2_bars[ARRAY_SIZE(npu2_bars) - 1].base + in assign_mmio_bars()
1511 mm_win[0]; in assign_mmio_bars()
1521 uint64_t reg[2], mm_win[2], val, mask; in npu2_nvlink_init_npu() local
1606 assign_mmio_bars(npu->chip_id, npu->xscom_base, reg, mm_win); in npu2_nvlink_init_npu()
1608 npu->mm_base = mm_win[0]; in npu2_nvlink_init_npu()
1609 npu->mm_size = mm_win[1]; in npu2_nvlink_init_npu()
1632 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu2_nvlink_init_npu()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | npu2-opencapi.c | 1657 uint64_t mm_win[2]; in setup_device() local
1660 phys_map_get(dev->npu->chip_id, NPU_OCAPI_MMIO, dev->brick_index, &mm_win[0], in setup_device()
1661 &mm_win[1]); in setup_device()
1663 mm_win[0], mm_win[1]); in setup_device()
1664 dn_phb = dt_new_addr(dt_root, "pciex", mm_win[0]); in setup_device()
1679 dt_add_property(dn_phb, "reg", mm_win, sizeof(mm_win)); in setup_device()
1685 dt_add_property(dn_phb, "ibm,mmio-window", mm_win, sizeof(mm_win)); in setup_device()
1696 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1697 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1698 hi32(mm_win[1]), lo32(mm_win[1])); in setup_device()
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| H A D | npu.c | 1024 struct dt_node *npu_dn, uint64_t mm_win[2], in assign_mmio_bars()
1086 mm_win[0] = bar.base + bar.size; in assign_mmio_bars()
1098 mm_win[1] = (bar.base + bar.size) - mm_win[0]; in assign_mmio_bars()
1115 uint64_t at_bar[2], mm_win[2]; in npu_probe_phb() local
1133 assign_mmio_bars(gcid, xscom, dn, mm_win, at_bar); in npu_probe_phb()
1152 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu_probe_phb()
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| H A D | npu2.c | 1461 static void assign_mmio_bars(uint64_t gcid, uint32_t scom, uint64_t reg[2], uint64_t mm_win[2]) in assign_mmio_bars()
1508 mm_win[0] = npu2_bars[3].base; in assign_mmio_bars()
1509 mm_win[1] = npu2_bars[ARRAY_SIZE(npu2_bars) - 1].base + in assign_mmio_bars()
1511 mm_win[0]; in assign_mmio_bars()
1521 uint64_t reg[2], mm_win[2], val, mask; in npu2_nvlink_init_npu() local
1606 assign_mmio_bars(npu->chip_id, npu->xscom_base, reg, mm_win); in npu2_nvlink_init_npu()
1608 npu->mm_base = mm_win[0]; in npu2_nvlink_init_npu()
1609 npu->mm_size = mm_win[1]; in npu2_nvlink_init_npu()
1632 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu2_nvlink_init_npu()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/hw/ |
| H A D | npu2-opencapi.c | 1657 uint64_t mm_win[2]; in setup_device() local
1660 phys_map_get(dev->npu->chip_id, NPU_OCAPI_MMIO, dev->brick_index, &mm_win[0], in setup_device()
1661 &mm_win[1]); in setup_device()
1663 mm_win[0], mm_win[1]); in setup_device()
1664 dn_phb = dt_new_addr(dt_root, "pciex", mm_win[0]); in setup_device()
1679 dt_add_property(dn_phb, "reg", mm_win, sizeof(mm_win)); in setup_device()
1685 dt_add_property(dn_phb, "ibm,mmio-window", mm_win, sizeof(mm_win)); in setup_device()
1696 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1697 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1698 hi32(mm_win[1]), lo32(mm_win[1])); in setup_device()
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| H A D | npu.c | 1024 struct dt_node *npu_dn, uint64_t mm_win[2],
1086 mm_win[0] = bar.base + bar.size;
1098 mm_win[1] = (bar.base + bar.size) - mm_win[0];
1115 uint64_t at_bar[2], mm_win[2];
1133 assign_mmio_bars(gcid, xscom, dn, mm_win, at_bar);
1152 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win));
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| H A D | npu2.c | 1461 static void assign_mmio_bars(uint64_t gcid, uint32_t scom, uint64_t reg[2], uint64_t mm_win[2]) in assign_mmio_bars()
1508 mm_win[0] = npu2_bars[3].base; in assign_mmio_bars()
1509 mm_win[1] = npu2_bars[ARRAY_SIZE(npu2_bars) - 1].base + in assign_mmio_bars()
1511 mm_win[0]; in assign_mmio_bars()
1521 uint64_t reg[2], mm_win[2], val, mask; in npu2_nvlink_init_npu() local
1606 assign_mmio_bars(npu->chip_id, npu->xscom_base, reg, mm_win); in npu2_nvlink_init_npu()
1608 npu->mm_base = mm_win[0]; in npu2_nvlink_init_npu()
1609 npu->mm_size = mm_win[1]; in npu2_nvlink_init_npu()
1632 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu2_nvlink_init_npu()
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| /dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/hw/ |
| H A D | npu2-opencapi.c | 1657 uint64_t mm_win[2]; in setup_device() local
1660 phys_map_get(dev->npu->chip_id, NPU_OCAPI_MMIO, dev->brick_index, &mm_win[0], in setup_device()
1661 &mm_win[1]); in setup_device()
1663 mm_win[0], mm_win[1]); in setup_device()
1664 dn_phb = dt_new_addr(dt_root, "pciex", mm_win[0]); in setup_device()
1679 dt_add_property(dn_phb, "reg", mm_win, sizeof(mm_win)); in setup_device()
1685 dt_add_property(dn_phb, "ibm,mmio-window", mm_win, sizeof(mm_win)); in setup_device()
1696 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1697 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1698 hi32(mm_win[1]), lo32(mm_win[1])); in setup_device()
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| H A D | npu.c | 1024 struct dt_node *npu_dn, uint64_t mm_win[2], in assign_mmio_bars()
1086 mm_win[0] = bar.base + bar.size; in assign_mmio_bars()
1098 mm_win[1] = (bar.base + bar.size) - mm_win[0]; in assign_mmio_bars()
1115 uint64_t at_bar[2], mm_win[2]; in npu_probe_phb() local
1133 assign_mmio_bars(gcid, xscom, dn, mm_win, at_bar); in npu_probe_phb()
1152 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu_probe_phb()
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| H A D | npu2.c | 1461 static void assign_mmio_bars(uint64_t gcid, uint32_t scom, uint64_t reg[2], uint64_t mm_win[2]) in assign_mmio_bars()
1508 mm_win[0] = npu2_bars[3].base; in assign_mmio_bars()
1509 mm_win[1] = npu2_bars[ARRAY_SIZE(npu2_bars) - 1].base + in assign_mmio_bars()
1511 mm_win[0]; in assign_mmio_bars()
1521 uint64_t reg[2], mm_win[2], val, mask; in npu2_nvlink_init_npu() local
1606 assign_mmio_bars(npu->chip_id, npu->xscom_base, reg, mm_win); in npu2_nvlink_init_npu()
1608 npu->mm_base = mm_win[0]; in npu2_nvlink_init_npu()
1609 npu->mm_size = mm_win[1]; in npu2_nvlink_init_npu()
1632 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu2_nvlink_init_npu()
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| /dports/emulators/qemu/qemu-6.2.0/roms/skiboot/hw/ |
| H A D | npu2-opencapi.c | 1764 uint64_t mm_win[2]; in setup_device() local
1767 phys_map_get(dev->npu->chip_id, NPU_OCAPI_MMIO, dev->brick_index, &mm_win[0], in setup_device()
1768 &mm_win[1]); in setup_device()
1770 mm_win[0], mm_win[1]); in setup_device()
1771 dn_phb = dt_new_addr(dt_root, "pciex", mm_win[0]); in setup_device()
1786 dt_add_property(dn_phb, "reg", mm_win, sizeof(mm_win)); in setup_device()
1794 dt_add_property(dn_phb, "ibm,mmio-window", mm_win, sizeof(mm_win)); in setup_device()
1805 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1806 hi32(mm_win[0]), lo32(mm_win[0]), in setup_device()
1807 hi32(mm_win[1]), lo32(mm_win[1])); in setup_device()
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| H A D | npu.c | 1018 struct dt_node *npu_dn, uint64_t mm_win[2], in assign_mmio_bars()
1080 mm_win[0] = bar.base + bar.size; in assign_mmio_bars()
1092 mm_win[1] = (bar.base + bar.size) - mm_win[0]; in assign_mmio_bars()
1109 uint64_t at_bar[2], mm_win[2]; in npu_probe_phb() local
1127 assign_mmio_bars(gcid, xscom, dn, mm_win, at_bar); in npu_probe_phb()
1146 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu_probe_phb()
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| H A D | npu2.c | 1321 static void assign_mmio_bars(uint64_t gcid, uint32_t scom, uint64_t reg[2], uint64_t mm_win[2]) in assign_mmio_bars()
1368 mm_win[0] = npu2_bars[3].base; in assign_mmio_bars()
1369 mm_win[1] = npu2_bars[ARRAY_SIZE(npu2_bars) - 1].base + in assign_mmio_bars()
1371 mm_win[0]; in assign_mmio_bars()
1381 uint64_t reg[2], mm_win[2], val, mask; in npu2_nvlink_init_npu() local
1466 assign_mmio_bars(npu->chip_id, npu->xscom_base, reg, mm_win); in npu2_nvlink_init_npu()
1468 npu->mm_base = mm_win[0]; in npu2_nvlink_init_npu()
1469 npu->mm_size = mm_win[1]; in npu2_nvlink_init_npu()
1492 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu2_nvlink_init_npu()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/ |
| H A D | npu.c | 1026 struct dt_node *npu_dn, uint64_t mm_win[2], in assign_mmio_bars()
1088 mm_win[0] = bar.base + bar.size; in assign_mmio_bars()
1100 mm_win[1] = (bar.base + bar.size) - mm_win[0]; in assign_mmio_bars()
1117 uint64_t at_bar[2], mm_win[2]; in npu_probe_phb() local
1135 assign_mmio_bars(gcid, xscom, dn, mm_win, at_bar); in npu_probe_phb()
1154 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu_probe_phb()
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| H A D | npu2.c | 1218 static void assign_mmio_bars(uint64_t gcid, uint32_t scom, uint64_t reg[2], uint64_t mm_win[2]) in assign_mmio_bars()
1272 mm_win[0] = npu2_bars[3].base; in assign_mmio_bars()
1273 mm_win[1] = npu2_bars[ARRAY_SIZE(npu2_bars) - 1].base + in assign_mmio_bars()
1275 mm_win[0]; in assign_mmio_bars()
1288 uint64_t reg[2], mm_win[2]; in npu2_probe_phb() local
1348 assign_mmio_bars(gcid, scom, reg, mm_win); in npu2_probe_phb()
1371 dt_add_property(np, "ibm,mmio-window", mm_win, sizeof(mm_win)); in npu2_probe_phb()
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