Home
last modified time | relevance | path

Searched refs:msc01 (Results 1 – 25 of 66) sorted by relevance

123

/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/pci/
H A Dpci_msc01.c27 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
32 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
33 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
46 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
67 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
70 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
89 struct msc01_pci_controller *msc01; in msc01_pci_init() local
92 msc01 = &global_msc01; in msc01_pci_init()
93 msc01->base = base; in msc01_pci_init()
95 hose = &msc01->hose; in msc01_pci_init()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/pci/
H A Dpci_msc01.c27 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
32 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
33 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
46 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
67 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
70 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
89 struct msc01_pci_controller *msc01; in msc01_pci_init() local
92 msc01 = &global_msc01; in msc01_pci_init()
93 msc01->base = base; in msc01_pci_init()
95 hose = &msc01->hose; in msc01_pci_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/pci/
H A Dpci_msc01.c27 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
32 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
33 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
46 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
67 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
70 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
89 struct msc01_pci_controller *msc01; in msc01_pci_init() local
92 msc01 = &global_msc01; in msc01_pci_init()
93 msc01->base = base; in msc01_pci_init()
95 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/pci/
H A Dpci_msc01.c27 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
32 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
33 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
46 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
67 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
70 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
89 struct msc01_pci_controller *msc01; in msc01_pci_init() local
92 msc01 = &global_msc01; in msc01_pci_init()
93 msc01->base = base; in msc01_pci_init()
95 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()
/dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/drivers/pci/
H A Dpci_msc01.c28 static int msc01_config_access(struct msc01_pci_controller *msc01, in msc01_config_access() argument
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS; in msc01_config_access()
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; in msc01_config_access()
47 msc01->base + MSC01_PCI_CFGADDR_OFS); in msc01_config_access()
68 struct msc01_pci_controller *msc01 = hose_to_msc01(hose); in msc01_read_config_dword() local
71 return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value); in msc01_read_config_dword()
90 struct msc01_pci_controller *msc01; in msc01_pci_init() local
93 msc01 = &global_msc01; in msc01_pci_init()
94 msc01->base = base; in msc01_pci_init()
96 hose = &msc01->hose; in msc01_pci_init()

123