| /dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/Nios2/ |
| H A D | mul-div.ll | 4 define i32 @mul_reg(i32 %a, i32 %b) nounwind {
6 ; CHECK: mul_reg:
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/clk/renesas/ |
| H A D | clk-rcar-gen3.c | 161 u32 mul_reg, u32 mult, u32 div, in gen3_clk_get_rate64_pll_mul_reg() argument
167 if (mul_reg) { in gen3_clk_get_rate64_pll_mul_reg()
168 value = readl(priv->base + mul_reg); in gen3_clk_get_rate64_pll_mul_reg()
|