| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_prs.c | 93 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
1361 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
1391 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
1423 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
1462 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
1494 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
1520 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2322 mvpp2_prs_shadow_ri_set(priv, pe.index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_prs.c | 93 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
1361 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
1391 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
1423 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
1462 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
1494 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
1520 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2322 mvpp2_prs_shadow_ri_set(priv, pe.index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_prs.c | 93 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
1361 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
1391 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
1423 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
1462 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
1494 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
1520 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2322 mvpp2_prs_shadow_ri_set(priv, pe.index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/net/ |
| H A D | mvpp2.c | 1473 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2015 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2045 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2077 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2114 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2144 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2175 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2201 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2384 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/net/ |
| H A D | mvpp2.c | 1473 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2015 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2045 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2077 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2114 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2144 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2175 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2201 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2384 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/net/ |
| H A D | mvpp2.c | 1473 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2015 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2045 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2077 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2114 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2144 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2175 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2201 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2384 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/net/ |
| H A D | mvpp2.c | 1473 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2015 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2045 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2077 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2114 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2144 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2175 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2201 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2384 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
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| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
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| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1462 static void mvpp2_prs_shadow_ri_set(struct mvpp2 *priv, int index, in mvpp2_prs_shadow_ri_set() function
2004 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, in mvpp2_prs_etype_init()
2034 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_ARP, in mvpp2_prs_etype_init()
2066 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_CPU_CODE_RX_SPEC | in mvpp2_prs_etype_init()
2103 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4, in mvpp2_prs_etype_init()
2133 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP4_OPT, in mvpp2_prs_etype_init()
2164 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_IP6, in mvpp2_prs_etype_init()
2190 mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_L3_UN, in mvpp2_prs_etype_init()
2373 mvpp2_prs_shadow_ri_set(priv, pe->index, ri, MVPP2_PRS_RI_L2_CAST_MASK | in mvpp2_prs_mac_da_accept()
|