/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/misc/util/ |
H A D | utilCex.c | 58 pCex->nPis = nRealPis; in Abc_CexAlloc() 69 pCex->nPis = nRealPis; in Abc_CexAllocFull() 180 for ( i = 0; i < nPis; i++ ) in Abc_CexDeriveFromCombModel() 217 assert( pCex->nPis == pPart->nPis ); in Abc_CexMerge() 288 assert( nRealPis <= p->nPis ); in Abc_CexPrintStatsInputs() 292 if ( nRealPis == p->nPis ) in Abc_CexPrintStatsInputs() 302 if ( nRealPis < p->nPis ) in Abc_CexPrintStatsInputs() 404 int nFrames = p->nPis / nPisOld; in Abc_CexTransformPhase() 406 assert( p->nPis % nPisOld == 0 ); in Abc_CexTransformPhase() 409 pCex->nPis = nPisOld; in Abc_CexTransformPhase() [all …]
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H A D | utilCex.h | 45 int nPis; // the number of primary inputs in the miter member 64 extern Abc_Cex_t * Abc_CexDeriveFromCombModel( int * pModel, int nPis, int nRegs, int iPo );
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/dports/math/stp/stp-2.3.3/lib/extlib-abc/aig/aig/ |
H A D | aigTime.c | 93 Aig_TMan_t * Aig_TManStart( int nPis, int nPos ) in Aig_TManStart() argument 102 p->nPis = nPis; in Aig_TManStart() 104 p->pPis = ALLOC( Aig_TObj_t, nPis ); in Aig_TManStart() 108 for ( i = 0; i < nPis; i++ ) in Aig_TManStart() 154 pBox->nInputs = nPis; in Aig_TManCreateBox() 156 for ( i = 0; i < nPis; i++ ) in Aig_TManCreateBox() 158 assert( pPis[i] < p->nPis ); in Aig_TManCreateBox() 166 pBox->Inouts[nPis+i] = pPos[i]; in Aig_TManCreateBox() 185 assert( iPi < p->nPis ); in Aig_TManSetPiDelay() 219 assert( iPi < p->nPis ); in Aig_TManSetPiArrival() [all …]
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/sat/bmc/ |
H A D | bmcCexCare.c | 51 assert( pCex->nPis == pCexCare->nPis ); in Bmc_CexCareExtendToObjects() 260 if ( pCex->nPis != Gia_ManPiNum(p) ) in Bmc_CexCareMinimizeAig() 275 assert( pCex->nPis == Gia_ManPiNum(p) ); in Bmc_CexCareMinimizeAig() 283 vPriosIn = Vec_IntAlloc( pCex->nPis * (pCex->iFrame + 1) ); in Bmc_CexCareMinimizeAig() 332 …ntWriteEntry( vPriosIn, f * pCex->nPis + i, Abc_Var2Lit(Counter++, Abc_InfoHasBit(pCex->pData, pCe… in Bmc_CexCareMinimizeAig() 335 …ntWriteEntry( vPriosIn, f * pCex->nPis + i, Abc_Var2Lit(Counter++, Abc_InfoHasBit(pCex->pData, pCe… in Bmc_CexCareMinimizeAig() 341 …ntWriteEntry( vPriosIn, f * pCex->nPis + i, Abc_Var2Lit(Counter++, Abc_InfoHasBit(pCex->pData, pCe… in Bmc_CexCareMinimizeAig() 344 …ntWriteEntry( vPriosIn, f * pCex->nPis + i, Abc_Var2Lit(Counter++, Abc_InfoHasBit(pCex->pData, pCe… in Bmc_CexCareMinimizeAig() 350 …ntWriteEntry( vPriosIn, f * pCex->nPis + i, Abc_Var2Lit(Counter++, Abc_InfoHasBit(pCex->pData, pCe… in Bmc_CexCareMinimizeAig() 353 …ntWriteEntry( vPriosIn, f * pCex->nPis + i, Abc_Var2Lit(Counter++, Abc_InfoHasBit(pCex->pData, pCe… in Bmc_CexCareMinimizeAig() [all …]
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H A D | bmcCexTools.c | 62 if ( (k - p->nRegs) % p->nPis < nInputs ) in Bmc_CexBitCount() 325 for ( ; k < pCex->nPis; k++ ) in Bmc_CexPrint() 361 else if ( Abc_InfoHasBit( pCex->pData, pCex->nRegs + i * pCex->nPis + k ) ) in Bmc_CexVerify() 427 Abc_InfoSetBit( pNew->pData, pNew->nPis * i + k ); in Bmc_CexInnerStates() 429 Abc_InfoSetBit( pNew2->pData, pNew2->nPis * i + k ); in Bmc_CexInnerStates() 569 iBit = pCexState->nPis * i; in Bmc_CexCareBits() 622 Abc_InfoSetBit(pNew->pData, pNew->nPis * i + k); in Bmc_CexCareBits() 662 for ( i = iBit / pCexState->nPis; i <= pCexState->iFrame; i++ ) in Bmc_CexEssentialBitOne() 666 pObj->fMark0 = Abc_InfoHasBit( pCexState->pData, i * pCexState->nPis + k ); in Bmc_CexEssentialBitOne() 693 int iBitShift = (i + 1) * pCexState->nPis + Gia_ManPiNum(p); in Bmc_CexEssentialBitOne() [all …]
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H A D | bmcCexMin1.c | 186 pObj->fPhase = Abc_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + i); in Saig_ManCexMinVerifyPhase() 268 nPrioOffset = (pCex->iFrame + 1) * pCex->nPis; in Saig_ManCexMinCollectPhasePriority_() 282 …ramePPsOne, Abc_Var2Lit( (f+1) * pCex->nPis - nPiCount++, Abc_InfoHasBit(pCex->pData, pCex->nRegs … in Saig_ManCexMinCollectPhasePriority_() 323 Aig_ManConst1(pAig)->iData = Abc_Var2Lit( nPrioOffset + (pCex->iFrame + 1) * pCex->nPis, 1 ); in Saig_ManCexMinCollectPhasePriority() 336 …Var2Lit( nPrioOffset + (f+1) * pCex->nPis - 1 - nPiCount++, Abc_InfoHasBit(pCex->pData, pCex->nReg… in Saig_ManCexMinCollectPhasePriority() 468 assert( pCex->nPis == Saig_ManPiNum(pAig) ); in Saig_ManCexMinComputeReason()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/map/if/ |
H A D | ifLibBox.c | 58 p->nPis = nPis; in If_BoxStart() 60 p->pDelays = ABC_CALLOC( int, nPis * nPos ); in If_BoxStart() 169 int i, Id, nPis, nPos; in If_LibBoxRead2() local 177 nPis = nPos = 0; in If_LibBoxRead2() 196 nPis = atoi( pToken ); in If_LibBoxRead2() 224 assert( nPis > 0 && nPos > 0 ); in If_LibBoxRead2() 225 for ( i = 0; i < nPis * nPos; i++ ) in If_LibBoxRead2() 284 int i, Id, fBlack, nPis, nPos; in If_LibBoxRead() local 320 nPis = atoi( pToken ); in If_LibBoxRead() 328 for ( i = 0; i < nPis * nPos; i++ ) in If_LibBoxRead() [all …]
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/proof/pdr/ |
H A D | pdrMan.c | 428 assert( Abc_Lit2Var(Lit) < pCex->nPis ); in Pdr_ManDeriveCex() 456 int nPis = Saig_ManPiNum(p->pAig); in Pdr_ManDeriveCexAbs() local 473 if ( Abc_Lit2Var(Lit) < nPis ) // PI literal in Pdr_ManDeriveCexAbs() 475 Flop = Abc_Lit2Var(Lit) - nPis; in Pdr_ManDeriveCexAbs() 507 if ( Abc_Lit2Var(Lit) < nPis ) // PI literal in Pdr_ManDeriveCexAbs() 511 int iPPI = nPis + Vec_IntEntry(p->vMapFf2Ppi, Abc_Lit2Var(Lit) - nPis); in Pdr_ManDeriveCexAbs() 512 assert( iPPI < pCex->nPis ); in Pdr_ManDeriveCexAbs() 513 Abc_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + iPPI ); in Pdr_ManDeriveCexAbs() 519 pCexCare = Bmc_CexCareMinimizeAig( pAbs, nPis, pCex, 1, 0, 0 ); in Pdr_ManDeriveCexAbs() 521 assert( pCexCare->nPis == pCex->nPis ); in Pdr_ManDeriveCexAbs() [all …]
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/opt/fsim/ |
H A D | fsimTsim.c | 136 if ( iPioNum < p->nPis ) in Fsim_ManTerSimInfoInit() 159 if ( iPioNum < p->nPis ) in Fsim_ManTerSimInfoTransfer() 162 …rSimInfoSet( p->pDataSimCis, i, Fsim_ManTerSimInfoGet( p->pDataSimCos, p->nPos+iPioNum-p->nPis ) ); in Fsim_ManTerSimInfoTransfer() 255 unsigned * Fsim_ManTerStateCreate( unsigned * pInfo, int nPis, int nCis, int nWords ) in Fsim_ManTerStateCreate() argument 260 for ( i = nPis; i < nCis; i++ ) in Fsim_ManTerStateCreate() 261 Fsim_ManTerSimInfoSet( pRes, i-nPis, Fsim_ManTerSimInfoGet(pInfo, i) ); in Fsim_ManTerStateCreate() 381 pState = Fsim_ManTerStateCreate( p->pDataSimCis, p->nPis, p->nCis, nWords ); in Fsim_ManTerSimulate() 390 pState = Fsim_ManTerStateCreate( p->pDataSimCis, p->nPis, p->nCis, nWords ); in Fsim_ManTerSimulate()
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H A D | fsimSim.c | 218 if ( iPioNum < p->nPis ) in Fsim_ManSimInfoInit() 241 if ( iPioNum < p->nPis ) in Fsim_ManSimInfoTransfer() 244 … Fsim_ManSimInfoCopy( p, Fsim_SimDataCi(p, i), Fsim_SimDataCo(p, p->nPos+iPioNum-p->nPis) ); in Fsim_ManSimInfoTransfer() 445 for ( f = 0; f <= iFrame; f++, Counter += p->nPis ) in Fsim_ManGenerateCounter() 449 if ( iPioId >= p->nPis ) in Fsim_ManGenerateCounter()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/base/abci/ |
H A D | abcGen.c | 659 nDigitsIn = Abc_Base10Log( nPis+nRegs ); in Abc_GenOneHotIntervals() 660 for ( i = 0; i < nPis+nRegs; i++ ) in Abc_GenOneHotIntervals() 717 nDigitsIn = Abc_Base10Log( nPis ); in Abc_GenRandom() 718 for ( i = 0; i < nPis; i++ ) in Abc_GenRandom() 723 nDigitsIn = Abc_Base10Log( nPis ); in Abc_GenRandom() 724 for ( i = 0; i < nPis; i++ ) in Abc_GenRandom() 727 for ( i = 0; i < (1<<nPis); i++ ) in Abc_GenRandom() 730 for ( b = nPis-1; b >= 0; b-- ) in Abc_GenRandom() 756 for ( i = 0; i < nPis; i++ ) in Abc_GenFsmCond() 801 fprintf( pFile, ".i %d\n", nPis ); in Abc_GenFsm() [all …]
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/opt/sfm/ |
H A D | sfmInt.h | 74 int nPis; // PI count (PIs should be first objects) member 144 static inline int Sfm_NtkPiNum( Sfm_Ntk_t * p ) { return p->nPis; … in Sfm_NtkPiNum() 146 static inline int Sfm_NtkNodeNum( Sfm_Ntk_t * p ) { return p->nObjs - p->nPis… in Sfm_NtkNodeNum() 148 static inline int Sfm_ObjIsPi( Sfm_Ntk_t * p, int i ) { return i < p->nPis; … in Sfm_ObjIsPi() 150 static inline int Sfm_ObjIsNode( Sfm_Ntk_t * p, int i ) { return i >= p->nPis && i … in Sfm_ObjIsNode() 187 #define Sfm_NtkForEachPi( p, i ) for ( i = 0; i < p->nPis; i++ ) 189 #define Sfm_NtkForEachNode( p, i ) for ( i = p->nPis; i + p->nPos < p->nObjs; i++ ) 190 #define Sfm_NtkForEachNodeReverse( p, i ) for ( i = p->nObjs - p->nPos - 1; i >= p->nPis; i-… 215 extern Sfm_Ntk_t * Sfm_ConstructNetwork( Vec_Wec_t * vFanins, int nPis, int nPos );
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H A D | sfmNtk.c | 45 void Sfm_CheckConsistency( Vec_Wec_t * vFanins, int nPis, int nPos, Vec_Str_t * vFixed ) in Sfm_CheckConsistency() argument 53 if ( i < nPis ) in Sfm_CheckConsistency() 167 Sfm_Ntk_t * Sfm_NtkConstruct( Vec_Wec_t * vFanins, int nPis, int nPos, Vec_Str_t * vFixed, Vec_Str_… in Sfm_NtkConstruct() argument 170 Sfm_CheckConsistency( vFanins, nPis, nPos, vFixed ); in Sfm_NtkConstruct() 173 p->nPis = nPis; in Sfm_NtkConstruct() 175 p->nNodes = p->nObjs - p->nPis - p->nPos; in Sfm_NtkConstruct()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/aig/saig/ |
H A D | saigSimSeq.c | 39 int nPis; // the number of primary inputs member 155 p->nPis = Saig_ManPiNum(pAig); in Raig_ManCreate() 311 if ( iPioNum < p->nPis ) in Raig_ManSimulateRound() 313 pRes = Raig_ManSimRef( p, Vec_IntEntry(p->vLos, iPioNum-p->nPis) ); in Raig_ManSimulateRound() 318 pRes0 = Raig_ManSimDeref( p, Vec_IntEntry(p->vLis, iPioNum-p->nPis) ); in Raig_ManSimulateRound() 326 Raig_ManSimDeref( p, Vec_IntEntry(p->vLos, iPioNum-p->nPis) ); in Raig_ManSimulateRound() 336 if ( iPioNum < p->nPis ) in Raig_ManSimulateRound() 349 assert( Vec_IntEntry(p->vLos, iPioNum-p->nPis) == i ); in Raig_ManSimulateRound() 428 for ( f = 0; f <= iFrame; f++, Counter += p->nPis ) in Raig_ManGenerateCounter() 432 if ( iPioId >= p->nPis ) in Raig_ManGenerateCounter()
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H A D | saigRefSat.c | 104 Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput ); in Saig_RefManReason2Cex() 184 … pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ); in Saig_RefManFindReason() 273 assert( Saig_ManPiNum(pAig) == pCex->nPis ); in Saig_ManUnrollWithCex() 321 int iBit = pCex->nRegs + f * pCex->nPis + Aig_ObjCioId(pObj); in Saig_ManUnrollWithCex() 413 … pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ); in Saig_RefManSetPhases() 415 … if ( pCare && !Abc_InfoHasBit( pCare->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ) ) in Saig_RefManSetPhases() 486 Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput ); in Saig_RefManCreateCex() 742 … RetValue = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ); in Saig_RefManRefineWithSat() 935 if ( Saig_ManPiNum(pAig) != pCex->nPis ) in Saig_ManExtendCounterExampleTest3() 938 Aig_ManCiNum(pAig), pCex->nPis ); in Saig_ManExtendCounterExampleTest3()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/proof/abs/ |
H A D | absOut.c | 58 if ( Abc_InfoHasBit( pCexAbs->pData, pCexAbs->nRegs + pCexAbs->nPis * f + i ) ) in Gia_ManCexRemap() 61 Abc_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * f + iPiNum ); in Gia_ManCexRemap() 111 if ( Gia_ManPiNum(pAbs) != pCex->nPis ) in Gia_ManGlaRefine() 140 else if ( Abc_InfoHasBit(pCex->pData, pCex->nRegs + pCex->nPis * f + i) ) in Gia_ManGlaRefine() 193 for ( i = 0; i < pCare->nPis; i++ ) in Gia_ManGlaRefine() 194 if ( Abc_InfoHasBit( pCare->pData, pCare->nRegs + f * pCare->nPis + i ) ) in Gia_ManGlaRefine() 392 if ( Gia_ManPiNum(pAbs) != pCex->nPis ) in Gia_ManNewRefine()
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H A D | absOldSat.c | 104 Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput ); in Saig_RefManReason2Cex() 184 … pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ); in Saig_RefManFindReason() 273 assert( Saig_ManPiNum(pAig) == pCex->nPis ); in Saig_ManUnrollWithCex() 321 int iBit = pCex->nRegs + f * pCex->nPis + Aig_ObjCioId(pObj); in Saig_ManUnrollWithCex() 413 … pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ); in Saig_RefManSetPhases() 415 … if ( pCare && !Abc_InfoHasBit( pCare->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ) ) in Saig_RefManSetPhases() 486 Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput ); in Saig_RefManCreateCex() 742 … RetValue = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ); in Saig_RefManRefineWithSat() 935 if ( Saig_ManPiNum(pAig) != pCex->nPis ) in Saig_ManExtendCounterExampleTest3() 938 Aig_ManCiNum(pAig), pCex->nPis ); in Saig_ManExtendCounterExampleTest3()
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H A D | absOldCex.c | 79 assert( Saig_ManPiNum(pAig) + Vec_IntSize(vMapEntries) == pAbsCex->nPis ); in Saig_ManCbaFilterFlops() 89 iBit = pAbsCex->nRegs + f * pAbsCex->nPis + Saig_ManPiNum(pAig); in Saig_ManCbaFilterFlops() 102 iBit = pAbsCex->nRegs + (f + 1) * pAbsCex->nPis + Saig_ManPiNum(pAig); in Saig_ManCbaFilterFlops() 235 Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput ); in Saig_ManCbaReason2Cex() 324 … pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ); in Saig_ManCbaFindReason() 408 assert( Saig_ManPiNum(pAig) == pCex->nPis ); in Saig_ManCbaUnrollWithCex() 464 int iBit = pCex->nRegs + f * pCex->nPis + Aig_ObjCioId(pObj); in Saig_ManCbaUnrollWithCex() 790 if ( Saig_ManPiNum(pAig) != pCex->nPis ) in Saig_ManCbaFilterInputs() 793 Aig_ManCiNum(pAig), pCex->nPis ); in Saig_ManCbaFilterInputs()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/opt/nwk/ |
H A D | nwkMan.c | 130 int nPis; // the number of primary inputs in Nwk_ManCompareAndSaveBest() member 143 ParsNew.nPis = Nwk_ManPiNum( pNtk ); in Nwk_ManCompareAndSaveBest() 157 ParsBest.nPis = ParsNew.nPis; in Nwk_ManCompareAndSaveBest()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/base/wlc/ |
H A D | wlcAbs2.c | 199 Vec_Int_t * vMap = Vec_IntStartFull( pCex->nPis ); in Wlc_NtkAbsRefinement() 204 nRealPis = pCex->nPis - nPpiBits; in Wlc_NtkAbsRefinement() 207 assert( pCexCare->nPis == pCex->nPis ); in Wlc_NtkAbsRefinement() 210 for ( i = nRealPis; i < pCexCare->nPis; i++ ) in Wlc_NtkAbsRefinement() 211 if ( Abc_InfoHasBit(pCexCare->pData, pCexCare->nRegs + pCexCare->nPis * f + i) ) in Wlc_NtkAbsRefinement()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/bdd/llb/ |
H A D | llb1Matrix.c | 184 if ( iVar < p->nPis ) in Llb_MtrVarName() 186 else if ( iVar < p->nPis + p->nFfs ) in Llb_MtrVarName() 289 Llb_Mtr_t * Llb_MtrAlloc( int nPis, int nFfs, int nCols, int nRows ) in Llb_MtrAlloc() argument 294 p->nPis = nPis; in Llb_MtrAlloc()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/aig/gia/ |
H A D | giaCex.c | 95 assert( Gia_ManPiNum(pAig) == p->nPis ); in Gia_ManFindFailedPoCex() 143 assert( Gia_ManPiNum(pAig) == p->nPis ); in Gia_ManSetFailedPoCex() 330 Abc_InfoSetBit( pNew->pData, pNew->nPis * i + k ); in Gia_ManCexExtendToIncludeCurrentStates() 377 Abc_InfoSetBit( pNew->pData, pNew->nPis * i + k ); in Gia_ManCexExtendToIncludeAllObjects() 466 iFirstVar = pCnf->nVars - (pCex->iFrame+1) * pCex->nPis; in Gia_ManMinCex() 506 pCexMin = Abc_CexAlloc( pCex->nRegs, pCex->nPis, pCex->iFrame + 1 ); in Bmc_CexCareDeriveCex() 544 iFirstVar = pCnf->nVars - (pCex->iFrame+1) * pCex->nPis; in Bmc_CexCareSatBasedMinimizeAig() 599 Bmc_CexPrint( pCexBest, pCexBest->nPis, 0 ); in Bmc_CexCareSatBasedMinimizeAig()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/sat/cnf/ |
H A D | cnfUtil.c | 402 …t, int nLearnedDelta, int nLearnedPerce, int fVerbose, int fShowPattern, int ** ppModel, int nPis ) in Cnf_DataSolveFromFile() argument 455 if ( RetValue == 0 && nPis > 0 ) in Cnf_DataSolveFromFile() 457 *ppModel = ABC_ALLOC( int, nPis ); in Cnf_DataSolveFromFile() 458 for ( i = 0; i < nPis; i++ ) in Cnf_DataSolveFromFile() 459 (*ppModel)[i] = sat_solver_var_value( pSat, pCnf->nVars - nPis + i ); in Cnf_DataSolveFromFile()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/misc/tim/ |
H A D | timDump.c | 117 int VerNum, nCis, nCos, nPis, nPos; in Tim_ManLoad() local 129 nPis = Vec_StrGetI_ne( p, &iStr ); in Tim_ManLoad() 139 curPi = nPis; in Tim_ManLoad()
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/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/aig/miniaig/ |
H A D | minilut.h | 172 int i, nPis, nPos, nNodes; in Mini_LutPrintStats() local 173 nPis = 0; in Mini_LutPrintStats() 175 nPis++; in Mini_LutPrintStats() 182 printf( "PI = %d. PO = %d. LUT = %d.\n", nPis, nPos, nNodes ); in Mini_LutPrintStats()
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