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Searched refs:nVarsNew (Results 1 – 11 of 11) sorted by relevance

/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/opt/lpk/
H A DlpkAbcUtil.c145 int i, k, nVarsNew; in Lpk_FunSuppMinimize() local
153 nVarsNew = Kit_WordCountOnes(p->uSupp); in Lpk_FunSuppMinimize()
154 Kit_TruthShrink( Lpk_FunTruth(p, 1), Lpk_FunTruth(p, 0), nVarsNew, p->nVars, p->uSupp, 1 ); in Lpk_FunSuppMinimize()
169 assert( k == nVarsNew ); in Lpk_FunSuppMinimize()
/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/opt/dau/
H A DdauDsd.c677 int pVarsNew[6], nVarsNew, PosStart; in Dau_DsdPerform_rec() local
681 nVarsNew = 0; in Dau_DsdPerform_rec()
685 assert( nVarsNew > 0 ); in Dau_DsdPerform_rec()
687 if ( nVarsNew == 1 ) in Dau_DsdPerform_rec()
704 for ( v = 0; v < nVarsNew; v++ ) in Dau_DsdPerform_rec()
755 for ( v = 0; v < nVarsNew; v++ ) in Dau_DsdPerform_rec()
756 for ( u = v+1; u < nVarsNew; u++ ) in Dau_DsdPerform_rec()
806 for ( v = 0; v < nVarsNew; v++ ) in Dau_DsdPerform_rec()
809 for ( u = 0; u < nVarsNew; u++ ) in Dau_DsdPerform_rec()
1438 if ( nVarsNew == 0 ) in Dau_Dsd6DecomposeTripleVars()
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H A DdauNpn.c606 int nVarsNew = Abc_TtMinBase( pCur, NULL, nVars, nInputs ); in Dau_InsertFunction() local
608 unsigned Phase = Abc_TtCanonicizeWrap( Abc_TtCanonicizeAda, pMan, pCur, nVarsNew, Perm, 99 ); in Dau_InsertFunction()
616 Vec_IntPush( vNodSup, (nNodes << 16) | nVarsNew ); in Dau_InsertFunction()
/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/base/abci/
H A DabcLut.c672 int i, k, c, v, w, nVars, nVarsNew, nClasses, nCofs; in Abc_NodeDecomposeStep() local
725 nVarsNew = Abc_Base2Log( nClasses ); in Abc_NodeDecomposeStep()
726 assert( nVarsNew < p->nLutSize ); in Abc_NodeDecomposeStep()
733 for ( v = 0; v < nVarsNew; v++ ) in Abc_NodeDecomposeStep()
742 for ( v = 0; v < nVarsNew; v++ ) in Abc_NodeDecomposeStep()
771 for ( v = 0; v < nVarsNew; v++ ) in Abc_NodeDecomposeStep()
775 for ( v = nVarsNew; v < p->nLutSize; v++ ) in Abc_NodeDecomposeStep()
780 …Extra_TruthShrink( p->uCofs[0], p->uTruth, nVars - p->nLutSize + nVarsNew, nVars, ((1 << nVars) - … in Abc_NodeDecomposeStep()
782 assert( !Extra_TruthVarInSupport( p->uTruth, nVars, nVars - p->nLutSize + nVarsNew ) ); in Abc_NodeDecomposeStep()
/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/misc/util/
H A DutilIsop.c430 int nVarsNew; word Cost; in Abc_IsopCheck() local
433 for ( nVarsNew = nVars; nVarsNew > 6; nVarsNew-- ) in Abc_IsopCheck()
434 if ( Abc_TtHasVar( pOn, nVars, nVarsNew-1 ) || Abc_TtHasVar( pOnDc, nVars, nVarsNew-1 ) ) in Abc_IsopCheck()
436 if ( nVarsNew == 6 ) in Abc_IsopCheck()
440 Abc_TtStretch6( pRes, nVarsNew, nVars ); in Abc_IsopCheck()
768 int nVarsNew; word Cost; in Abc_EsopCheck() local
771 for ( nVarsNew = nVars; nVarsNew > 6; nVarsNew-- ) in Abc_EsopCheck()
772 if ( Abc_TtHasVar( pOn, nVars, nVarsNew-1 ) ) in Abc_EsopCheck()
774 if ( nVarsNew == 6 ) in Abc_EsopCheck()
775 Cost = Abc_Esop6Cover( *pOn, nVarsNew, CostLim, pCover ); in Abc_EsopCheck()
[all …]
/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/sat/proof/
H A Dpr.c118 static void Pr_ManResize( Pr_Man_t * p, int nVarsNew );
173 void Pr_ManResize( Pr_Man_t * p, int nVarsNew ) in Pr_ManResize() argument
176 if ( p->nVarsAlloc < nVarsNew ) in Pr_ManResize()
182 while ( p->nVarsAlloc < nVarsNew ) in Pr_ManResize()
199 if ( p->nVars < nVarsNew ) in Pr_ManResize()
200 p->nVars = nVarsNew; in Pr_ManResize()
/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/misc/extra/
H A DextraUtilSupp.c454 word Entry; int i, v, iVar, nVarsNew = nVars; in Abc_SuppSolve() local
483 nVarsNew--; in Abc_SuppSolve()
490 return nVarsNew; in Abc_SuppSolve()
/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/aig/gia/
H A DgiaMfs.c397 int nVarsNew; in Gia_ManInsertMfs() local
398 Abc_TtSimplify( pTruth, Vec_IntArray(vLeaves), Vec_IntSize(vLeaves), &nVarsNew ); in Gia_ManInsertMfs()
399 Vec_IntShrink( vLeaves, nVarsNew ); in Gia_ManInsertMfs()
H A DgiaIf.c1653 int pVarsNew[16], nVarsNew, iLitCofs[3]; in Gia_ManFromIfLogicCofVars() local
1668nVarsNew = Abc_TtMinBase( pTruthCof, pVarsNew, pCutBest->nLeaves, Abc_MaxInt(6, pCutBest->nLeaves)… in Gia_ManFromIfLogicCofVars()
1671 for ( k = 0; k < nVarsNew; k++ ) in Gia_ManFromIfLogicCofVars()
1673 iLitCofs[c] = Kit_TruthToGia( pNew, (unsigned *)pTruthCof, nVarsNew, vCover, vLeaves2, 0 ); in Gia_ManFromIfLogicCofVars()
1674 if ( nVarsNew < 2 ) in Gia_ManFromIfLogicCofVars()
H A DgiaLf.c1784 int pVarsNew[LF_LEAF_MAX], nVarsNew, iLitCofs[2]; in Lf_ManDerivePart() local
1797 nVarsNew = Abc_TtMinBase( pTruthCof, pVarsNew, pCut->nLeaves, LutSize ); in Lf_ManDerivePart()
1798 assert( nVarsNew > 0 ); in Lf_ManDerivePart()
1801 for ( k = 0; k < nVarsNew; k++ ) in Lf_ManDerivePart()
1803 … iLitCofs[c] = Kit_TruthToGia( pNew, (unsigned *)pTruthCof, nVarsNew, vCover, vLeaves, 0 ); in Lf_ManDerivePart()
/dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/map/if/
H A DifTune.c745 int i, k, iLit, iVar = 0, nVarsNew, pVarMap[1000]; in If_ManSatDeriveGiaFromBits() local
798 nVarsNew = Abc_TtMinBase( &uTruth, pFaninLits, nFans, 6 ); in If_ManSatDeriveGiaFromBits()
799 if ( nVarsNew == 0 ) in If_ManSatDeriveGiaFromBits()
804 Vec_Int_t Leaves = { nVarsNew, nVarsNew, pFaninLits }; in If_ManSatDeriveGiaFromBits()
805 …pVarMap[i] = Kit_TruthToGia( pNew, (unsigned *)&uTruth, nVarsNew, vCover, &Leaves, 1 ); // hashing… in If_ManSatDeriveGiaFromBits()