| /dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | npu.c | 147 static void npu_dev_bar_update(uint32_t gcid, struct npu_dev_bar *bar, in npu_dev_bar_update() function
184 npu_dev_bar_update(ndev->npu->chip_id, &ndev->bar, enable); in npu_dev_cfg_write_cmd()
251 npu_dev_bar_update(dev->npu->chip_id, bar, in npu_dev_cfg_bar_write()
981 npu_dev_bar_update(p->chip_id, &dev->bar, true); in npu_err_inject()
1068 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1074 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1082 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1096 npu_dev_bar_update(gcid, &bar, false); in assign_mmio_bars()
1534 npu_dev_bar_update(p->chip_id, bar, false); in npu_create_devices()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/ |
| H A D | npu.c | 147 static void npu_dev_bar_update(uint32_t gcid, struct npu_dev_bar *bar, in npu_dev_bar_update() function
184 npu_dev_bar_update(ndev->npu->chip_id, &ndev->bar, enable); in npu_dev_cfg_write_cmd()
251 npu_dev_bar_update(dev->npu->chip_id, bar, in npu_dev_cfg_bar_write()
981 npu_dev_bar_update(p->chip_id, &dev->bar, true); in npu_err_inject()
1068 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1074 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1082 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1096 npu_dev_bar_update(gcid, &bar, false); in assign_mmio_bars()
1534 npu_dev_bar_update(p->chip_id, bar, false); in npu_create_devices()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/ |
| H A D | npu.c | 147 static void npu_dev_bar_update(uint32_t gcid, struct npu_dev_bar *bar, in npu_dev_bar_update() function
184 npu_dev_bar_update(ndev->npu->chip_id, &ndev->bar, enable); in npu_dev_cfg_write_cmd()
251 npu_dev_bar_update(dev->npu->chip_id, bar, in npu_dev_cfg_bar_write()
982 npu_dev_bar_update(p->chip_id, &dev->bar, true); in npu_err_inject()
1070 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1076 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1084 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1098 npu_dev_bar_update(gcid, &bar, false); in assign_mmio_bars()
1536 npu_dev_bar_update(p->chip_id, bar, false); in npu_create_devices()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | npu.c | 147 static void npu_dev_bar_update(uint32_t gcid, struct npu_dev_bar *bar, in npu_dev_bar_update() function
184 npu_dev_bar_update(ndev->npu->chip_id, &ndev->bar, enable); in npu_dev_cfg_write_cmd()
251 npu_dev_bar_update(dev->npu->chip_id, bar, in npu_dev_cfg_bar_write()
981 npu_dev_bar_update(p->chip_id, &dev->bar, true); in npu_err_inject()
1068 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1074 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1082 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1096 npu_dev_bar_update(gcid, &bar, false); in assign_mmio_bars()
1534 npu_dev_bar_update(p->chip_id, bar, false); in npu_create_devices()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/hw/ |
| H A D | npu.c | 147 static void npu_dev_bar_update(uint32_t gcid, struct npu_dev_bar *bar,
184 npu_dev_bar_update(ndev->npu->chip_id, &ndev->bar, enable);
251 npu_dev_bar_update(dev->npu->chip_id, bar,
981 npu_dev_bar_update(p->chip_id, &dev->bar, true);
1068 npu_dev_bar_update(gcid, &bar, true);
1074 npu_dev_bar_update(gcid, &bar, true);
1082 npu_dev_bar_update(gcid, &bar, true);
1096 npu_dev_bar_update(gcid, &bar, false);
1534 npu_dev_bar_update(p->chip_id, bar, false);
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| /dports/emulators/qemu/qemu-6.2.0/roms/skiboot/hw/ |
| H A D | npu.c | 139 static void npu_dev_bar_update(uint32_t gcid, struct npu_dev_bar *bar, in npu_dev_bar_update() function
176 npu_dev_bar_update(ndev->npu->chip_id, &ndev->bar, enable); in npu_dev_cfg_write_cmd()
243 npu_dev_bar_update(dev->npu->chip_id, bar, in npu_dev_cfg_bar_write()
976 npu_dev_bar_update(p->chip_id, &dev->bar, true); in npu_err_inject()
1062 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1068 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1076 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1090 npu_dev_bar_update(gcid, &bar, false); in assign_mmio_bars()
1528 npu_dev_bar_update(p->chip_id, bar, false); in npu_create_devices()
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| /dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/hw/ |
| H A D | npu.c | 147 static void npu_dev_bar_update(uint32_t gcid, struct npu_dev_bar *bar, in npu_dev_bar_update() function
184 npu_dev_bar_update(ndev->npu->chip_id, &ndev->bar, enable); in npu_dev_cfg_write_cmd()
251 npu_dev_bar_update(dev->npu->chip_id, bar, in npu_dev_cfg_bar_write()
981 npu_dev_bar_update(p->chip_id, &dev->bar, true); in npu_err_inject()
1068 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1074 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1082 npu_dev_bar_update(gcid, &bar, true); in assign_mmio_bars()
1096 npu_dev_bar_update(gcid, &bar, false); in assign_mmio_bars()
1534 npu_dev_bar_update(p->chip_id, bar, false); in npu_create_devices()
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