| /dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | npu.c | 127 static uint64_t npu_link_scom_base(struct dt_node *dn, uint32_t scom_base, in npu_link_scom_base() function
1055 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_0, in assign_mmio_bars()
1059 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 5) + NX_MMIO_BAR_0, in assign_mmio_bars()
1065 bar.xscom = npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_1; in assign_mmio_bars()
1071 bar.xscom = npu_link_scom_base(npu_dn, xscom, 4) + NX_MMIO_BAR_1; in assign_mmio_bars()
1077 bar.xscom = npu_link_scom_base(npu_dn, xscom, 1) + NX_MMIO_BAR_1; in assign_mmio_bars()
1091 bar.xscom = npu_link_scom_base(npu_dn, xscom, index) + in assign_mmio_bars()
1493 dev->xscom = npu_link_scom_base(npu_dn, p->xscom_base, in npu_create_devices()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/ |
| H A D | npu.c | 127 static uint64_t npu_link_scom_base(struct dt_node *dn, uint32_t scom_base, in npu_link_scom_base() function
1055 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_0, in assign_mmio_bars()
1059 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 5) + NX_MMIO_BAR_0, in assign_mmio_bars()
1065 bar.xscom = npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_1; in assign_mmio_bars()
1071 bar.xscom = npu_link_scom_base(npu_dn, xscom, 4) + NX_MMIO_BAR_1; in assign_mmio_bars()
1077 bar.xscom = npu_link_scom_base(npu_dn, xscom, 1) + NX_MMIO_BAR_1; in assign_mmio_bars()
1091 bar.xscom = npu_link_scom_base(npu_dn, xscom, index) + in assign_mmio_bars()
1493 dev->xscom = npu_link_scom_base(npu_dn, p->xscom_base, in npu_create_devices()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/ |
| H A D | npu.c | 127 static uint64_t npu_link_scom_base(struct dt_node *dn, uint32_t scom_base, in npu_link_scom_base() function
1057 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_0, in assign_mmio_bars()
1061 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 5) + NX_MMIO_BAR_0, in assign_mmio_bars()
1067 bar.xscom = npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_1; in assign_mmio_bars()
1073 bar.xscom = npu_link_scom_base(npu_dn, xscom, 4) + NX_MMIO_BAR_1; in assign_mmio_bars()
1079 bar.xscom = npu_link_scom_base(npu_dn, xscom, 1) + NX_MMIO_BAR_1; in assign_mmio_bars()
1093 bar.xscom = npu_link_scom_base(npu_dn, xscom, index) + in assign_mmio_bars()
1495 dev->xscom = npu_link_scom_base(npu_dn, p->xscom_base, in npu_create_devices()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | npu.c | 127 static uint64_t npu_link_scom_base(struct dt_node *dn, uint32_t scom_base, in npu_link_scom_base() function
1055 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_0, in assign_mmio_bars()
1059 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 5) + NX_MMIO_BAR_0, in assign_mmio_bars()
1065 bar.xscom = npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_1; in assign_mmio_bars()
1071 bar.xscom = npu_link_scom_base(npu_dn, xscom, 4) + NX_MMIO_BAR_1; in assign_mmio_bars()
1077 bar.xscom = npu_link_scom_base(npu_dn, xscom, 1) + NX_MMIO_BAR_1; in assign_mmio_bars()
1091 bar.xscom = npu_link_scom_base(npu_dn, xscom, index) + in assign_mmio_bars()
1493 dev->xscom = npu_link_scom_base(npu_dn, p->xscom_base, in npu_create_devices()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/hw/ |
| H A D | npu.c | 127 static uint64_t npu_link_scom_base(struct dt_node *dn, uint32_t scom_base,
1055 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_0,
1059 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 5) + NX_MMIO_BAR_0,
1065 bar.xscom = npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_1;
1071 bar.xscom = npu_link_scom_base(npu_dn, xscom, 4) + NX_MMIO_BAR_1;
1077 bar.xscom = npu_link_scom_base(npu_dn, xscom, 1) + NX_MMIO_BAR_1;
1091 bar.xscom = npu_link_scom_base(npu_dn, xscom, index) +
1493 dev->xscom = npu_link_scom_base(npu_dn, p->xscom_base,
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| /dports/emulators/qemu/qemu-6.2.0/roms/skiboot/hw/ |
| H A D | npu.c | 119 static uint64_t npu_link_scom_base(struct dt_node *dn, uint32_t scom_base, in npu_link_scom_base() function
1049 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_0, in assign_mmio_bars()
1053 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 5) + NX_MMIO_BAR_0, in assign_mmio_bars()
1059 bar.xscom = npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_1; in assign_mmio_bars()
1065 bar.xscom = npu_link_scom_base(npu_dn, xscom, 4) + NX_MMIO_BAR_1; in assign_mmio_bars()
1071 bar.xscom = npu_link_scom_base(npu_dn, xscom, 1) + NX_MMIO_BAR_1; in assign_mmio_bars()
1085 bar.xscom = npu_link_scom_base(npu_dn, xscom, index) + in assign_mmio_bars()
1487 dev->xscom = npu_link_scom_base(npu_dn, p->xscom_base, in npu_create_devices()
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| /dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/hw/ |
| H A D | npu.c | 127 static uint64_t npu_link_scom_base(struct dt_node *dn, uint32_t scom_base, in npu_link_scom_base() function
1055 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_0, in assign_mmio_bars()
1059 xscom_read(gcid, npu_link_scom_base(npu_dn, xscom, 5) + NX_MMIO_BAR_0, in assign_mmio_bars()
1065 bar.xscom = npu_link_scom_base(npu_dn, xscom, 0) + NX_MMIO_BAR_1; in assign_mmio_bars()
1071 bar.xscom = npu_link_scom_base(npu_dn, xscom, 4) + NX_MMIO_BAR_1; in assign_mmio_bars()
1077 bar.xscom = npu_link_scom_base(npu_dn, xscom, 1) + NX_MMIO_BAR_1; in assign_mmio_bars()
1091 bar.xscom = npu_link_scom_base(npu_dn, xscom, index) + in assign_mmio_bars()
1493 dev->xscom = npu_link_scom_base(npu_dn, p->xscom_base, in npu_create_devices()
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