Searched refs:nvic_dfsr (Results 1 – 2 of 2) sorted by relevance
227 retval = mem_ap_read_atomic_u32(armv7m->debug_ap, NVIC_DFSR, &cortex_m->nvic_dfsr); in cortex_m_clear_halt()232 retval = mem_ap_write_atomic_u32(armv7m->debug_ap, NVIC_DFSR, cortex_m->nvic_dfsr); in cortex_m_clear_halt()235 LOG_DEBUG(" NVIC_DFSR 0x%" PRIx32 "", cortex_m->nvic_dfsr); in cortex_m_clear_halt()388 if (cortex_m->nvic_dfsr & DFSR_BKPT) { in cortex_m_examine_debug_reason()390 if (cortex_m->nvic_dfsr & DFSR_DWTTRAP) in cortex_m_examine_debug_reason()392 } else if (cortex_m->nvic_dfsr & DFSR_DWTTRAP) in cortex_m_examine_debug_reason()394 else if (cortex_m->nvic_dfsr & DFSR_VCATCH) in cortex_m_examine_debug_reason()396 else if (cortex_m->nvic_dfsr & DFSR_EXTERNAL) in cortex_m_examine_debug_reason()756 &cortex_m->nvic_dfsr); in cortex_m_soft_reset_halt()760 && (cortex_m->nvic_dfsr & DFSR_VCATCH)) { in cortex_m_soft_reset_halt()[all …]
193 uint32_t nvic_dfsr; /* Debug Fault Status Register - shows reason for debug halt */ member