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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-pine64/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/drivers/video/meson/
H A Dmeson_vclk.c428 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params() argument
519 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
523 3 << 21, pll_od_to_reg(od1) << 21); in meson_hdmi_pll_set_params()
526 3 << 16, pll_od_to_reg(od1) << 16); in meson_hdmi_pll_set_params()
669 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
674 od1 = 2; in meson_hdmi_pll_generic_set()
678 od1 = od / od2; in meson_hdmi_pll_generic_set()
682 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
684 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
711 if (!od1 && !od2 && !od3) { in meson_vclk_set()
[all …]

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