| /dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/proof/ssc/ |
| H A D | sscSim.c | 46 if ( fComp0 ) for ( w = 0; w < nWords; w++ ) pSim[w] = ~pSim0[w]; in Ssc_SimDup()
47 else for ( w = 0; w < nWords; w++ ) pSim[w] = pSim0[w]; in Ssc_SimDup()
60 if ( fComp0 ) for ( w = 0; w < nWords; w++ ) pSim[w] |= ~pSim0[w]; in Ssc_SimOr()
61 else for ( w = 0; w < nWords; w++ ) pSim[w] |= pSim0[w]; in Ssc_SimOr()
250 word * pSim, * pSim0, * pSim1; in Ssc_GiaSimRound() local
258 pSim0 = Gia_ObjSimPi( p, 0 ); in Ssc_GiaSimRound()
262 Ssc_SimDup( pSim, pSim0, nWords, 0 ); in Ssc_GiaSimRound()
264 pSim0 += nWords; in Ssc_GiaSimRound()
271 pSim0 = pSim - pObj->iDiff0 * nWords; in Ssc_GiaSimRound()
281 pSim0 = pSim - pObj->iDiff0 * nWords; in Ssc_GiaSimRound()
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| H A D | sscClass.c | 94 word * pSim0 = Gia_ObjSim( p, iObj0 ); in Ssc_GiaSimAreEqual() local
96 if ( (pSim0[0] & 1) != (pSim1[0] & 1) ) in Ssc_GiaSimAreEqual()
99 if ( pSim0[w] != ~pSim1[w] ) in Ssc_GiaSimAreEqual()
105 if ( pSim0[w] != pSim1[w] ) in Ssc_GiaSimAreEqual()
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| /dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/proof/dch/ |
| H A D | dchSim.c | 170 unsigned * pSim0, * pSim1; in Dch_NodesAreEqual() local
173 pSim0 = Dch_ObjSim( vSims, pObj0 ); in Dch_NodesAreEqual()
178 if ( pSim0[k] != ~pSim1[k] ) in Dch_NodesAreEqual()
184 if ( pSim0[k] != pSim1[k] ) in Dch_NodesAreEqual()
203 unsigned * pSim, * pSim0, * pSim1; in Dch_PerformRandomSimulation() local
225 pSim0 = Dch_ObjSim( vSims, Aig_ObjFanin0(pObj) ); in Dch_PerformRandomSimulation()
232 pSim[k] = ~pSim0[k] & ~pSim1[k]; in Dch_PerformRandomSimulation()
237 pSim[k] = ~pSim0[k] & pSim1[k]; in Dch_PerformRandomSimulation()
242 pSim[k] = pSim0[k] & ~pSim1[k]; in Dch_PerformRandomSimulation()
247 pSim[k] = pSim0[k] & pSim1[k]; in Dch_PerformRandomSimulation()
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| /dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/aig/saig/ |
| H A D | saigSynch.c | 196 unsigned * pSim0, * pSim1, * pSim; in Saig_SynchTernarySimulate() local
202 pSim0 = (unsigned *)Vec_PtrEntry( vSimInfo, Aig_ObjFaninId0(pObj) ); in Saig_SynchTernarySimulate()
212 pSim[w] = Saig_SynchAnd( pSim0[w], Saig_SynchNot(pSim1[w]) ); in Saig_SynchTernarySimulate()
217 pSim[w] = Saig_SynchAnd( Saig_SynchNot(pSim0[w]), pSim1[w] ); in Saig_SynchTernarySimulate()
222 pSim[w] = Saig_SynchAnd( pSim0[w], pSim1[w] ); in Saig_SynchTernarySimulate()
229 pSim0 = (unsigned *)Vec_PtrEntry( vSimInfo, Aig_ObjFaninId0(pObj) ); in Saig_SynchTernarySimulate()
233 pSim[w] = Saig_SynchNot( pSim0[w] ); in Saig_SynchTernarySimulate()
238 pSim[w] = pSim0[w]; in Saig_SynchTernarySimulate()
257 unsigned * pSim0, * pSim1; in Saig_SynchTernaryTransferState() local
261 pSim0 = (unsigned *)Vec_PtrEntry( vSimInfo, pObjLi->Id ); in Saig_SynchTernaryTransferState()
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| /dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/base/wlc/ |
| H A D | wlcSim.c | 81 word * pSim0 = Wlc_ObjSim( p, Gia_ObjFaninId0(pObj, iObj) ); in Wlc_ObjSimAnd() local
85 pSim[w] = ~pSim0[w] & ~pSim1[w]; in Wlc_ObjSimAnd()
88 pSim[w] = ~pSim0[w] & pSim1[w]; in Wlc_ObjSimAnd()
91 pSim[w] = pSim0[w] & ~pSim1[w]; in Wlc_ObjSimAnd()
94 pSim[w] = pSim0[w] & pSim1[w]; in Wlc_ObjSimAnd()
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| H A D | wlcGraft.c | 83 word * pSim0 = Wlc_ObjSim( p, Gia_ObjFaninId0(pObj, iObj) ); in Wlc_ObjSimAnd() local
87 pSim[w] = ~pSim0[w] & ~pSim1[w]; in Wlc_ObjSimAnd()
90 pSim[w] = ~pSim0[w] & pSim1[w]; in Wlc_ObjSimAnd()
93 pSim[w] = pSim0[w] & ~pSim1[w]; in Wlc_ObjSimAnd()
96 pSim[w] = pSim0[w] & pSim1[w]; in Wlc_ObjSimAnd()
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| /dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/base/abci/ |
| H A D | abcDetect.c | 655 word * pSim0 = Vec_WrdEntryP( vSims, nWords * Abc_ObjFaninId(pObj, i) ); in Abc_NtkFinSimOneBit() local
656 iBits[i] = Abc_InfoHasBit( (unsigned*)pSim0, iBit ); in Abc_NtkFinSimOneBit()
664 int iBit0 = Abc_ObjFaninNum(pObj) > 0 ? Abc_InfoHasBit( (unsigned*)pSim0, iBit ) : -1; in Abc_NtkFinSimOneBit()
701 else if ( Type == ABC_FIN_RDOB_BUFF ) for ( w = 0; w < nWords; w++ ) pSim[w] = pSim0[w]; in Abc_NtkFinSimOneWord()
702 else if ( Type == ABC_FIN_RDOB_NOT ) for ( w = 0; w < nWords; w++ ) pSim[w] = ~pSim0[w]; in Abc_NtkFinSimOneWord()
703 …else if ( Type == ABC_FIN_RDOB_AND ) for ( w = 0; w < nWords; w++ ) pSim[w] = pSim0[w] & pSim1[w]; in Abc_NtkFinSimOneWord()
704 …else if ( Type == ABC_FIN_RDOB_OR ) for ( w = 0; w < nWords; w++ ) pSim[w] = pSim0[w] | pSim1[w]; in Abc_NtkFinSimOneWord()
705 …else if ( Type == ABC_FIN_RDOB_XOR ) for ( w = 0; w < nWords; w++ ) pSim[w] = pSim0[w] ^ pSim1[w]; in Abc_NtkFinSimOneWord()
706 …else if ( Type == ABC_FIN_RDOB_NAND ) for ( w = 0; w < nWords; w++ ) pSim[w] = ~(pSim0[w] & pSim1[… in Abc_NtkFinSimOneWord()
721 word * pSim0 = Vec_WrdEntryP( vSims, nWords * Abc_ObjFaninId0(pObj) ); in Abc_NtkFinCompareSimTwo() local
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| /dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/proof/cec/ |
| H A D | cecSatG.c | 408 word * pSim0 = Cec3_ObjSim( p, Gia_ObjFaninId0(pObj, iObj) ); in Cec3_ObjSimAnd() local
412 pSim[w] = ~pSim0[w] & ~pSim1[w]; in Cec3_ObjSimAnd()
415 pSim[w] = ~pSim0[w] & pSim1[w]; in Cec3_ObjSimAnd()
418 pSim[w] = pSim0[w] & ~pSim1[w]; in Cec3_ObjSimAnd()
421 pSim[w] = pSim0[w] & pSim1[w]; in Cec3_ObjSimAnd()
426 word * pSim0 = Cec3_ObjSim( p, iObj0 ); in Cec3_ObjSimEqual() local
428 if ( (pSim0[0] & 1) == (pSim1[0] & 1) ) in Cec3_ObjSimEqual()
431 if ( pSim0[w] != pSim1[w] ) in Cec3_ObjSimEqual()
438 if ( pSim0[w] != ~pSim1[w] ) in Cec3_ObjSimEqual()
509 word * pSim0 = Cec3_ObjSim( p, iRepr ); in Cec3_ManSimulate() local
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| H A D | cecSat.c | 426 word * pSim0 = Cec2_ObjSim( p, Gia_ObjFaninId0(pObj, iObj) ); in Cec2_ObjSimAnd() local
430 pSim[w] = ~pSim0[w] & ~pSim1[w]; in Cec2_ObjSimAnd()
433 pSim[w] = ~pSim0[w] & pSim1[w]; in Cec2_ObjSimAnd()
436 pSim[w] = pSim0[w] & ~pSim1[w]; in Cec2_ObjSimAnd()
439 pSim[w] = pSim0[w] & pSim1[w]; in Cec2_ObjSimAnd()
444 word * pSim0 = Cec2_ObjSim( p, iObj0 ); in Cec2_ObjSimEqual() local
446 if ( (pSim0[0] & 1) == (pSim1[0] & 1) ) in Cec2_ObjSimEqual()
449 if ( pSim0[w] != pSim1[w] ) in Cec2_ObjSimEqual()
456 if ( pSim0[w] != ~pSim1[w] ) in Cec2_ObjSimEqual()
527 word * pSim0 = Cec2_ObjSim( p, iRepr ); in Cec2_ManSimulate() local
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| H A D | cecClass.c | 270 unsigned * pSim0, * pSim1; in Cec_ManSimClassRefineOne() local
275 pSim0 = Cec_ObjSim(p, i); in Cec_ManSimClassRefineOne()
279 if ( Cec_ManSimCompareEqual( pSim0, pSim1, p->nWords ) ) in Cec_ManSimClassRefineOne()
285 Cec_ManSimCompareEqualScore( pSim0, pSim1, p->nWords, p->pScores ); in Cec_ManSimClassRefineOne()
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| /dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/aig/gia/ |
| H A D | giaGen.c | 77 word * pSim0 = Gia_ManObjSim( p, Gia_ObjFaninId0(pObj, iObj) ); in Gia_ManObjSimAnd() local
81 pSim[w] = ~pSim0[w] & ~pSim1[w]; in Gia_ManObjSimAnd()
84 pSim[w] = ~pSim0[w] & pSim1[w]; in Gia_ManObjSimAnd()
87 pSim[w] = pSim0[w] & ~pSim1[w]; in Gia_ManObjSimAnd()
90 pSim[w] = pSim0[w] & pSim1[w]; in Gia_ManObjSimAnd()
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| H A D | giaSim2.c | 404 unsigned * pSim0, * pSim1; in Gia_Sim2ClassRefineOne() local
410 pSim0 = Gia_Sim2Data( p, i ); in Gia_Sim2ClassRefineOne()
415 … if ( Gia_Sim2CompareEqual( pSim0, pSim1, p->nWords, Gia_ObjPhase(pObj0) ^ Gia_ObjPhase(pObj1) ) ) in Gia_Sim2ClassRefineOne()
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| /dports/cad/abc/abc-a4518e6f833885c905964f1233d11e5b941ec24c/src/proof/ssw/ |
| H A D | sswRarity.c | 509 word * pSim0 = Ssw_RarObjSim( p, pObj0->Id ); in Ssw_RarManObjsAreEqual() local
514 if ( pSim0[w] ^ pSim1[w] ^ Flip ) in Ssw_RarManObjsAreEqual()
654 word * pSim, * pSim0, * pSim1; in Ssw_RarManSimulate() local
684 pSim0 = Ssw_RarObjSim( p, Aig_ObjFaninId0(pObj) ); in Ssw_RarManSimulate()
689 pSim[w] = (Flip0 ^ pSim0[w]) & (Flip1 ^ pSim1[w]); in Ssw_RarManSimulate()
713 pSim0 = Ssw_RarObjSim( p, Aig_ObjFaninId0(pObj) ); in Ssw_RarManSimulate()
716 pSim[w] = Flip ^ pSim0[w]; in Ssw_RarManSimulate()
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