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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/polly/test/Isl/CodeGen/
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 36 "relation" : "[p_0] -> { Stmt_if_then_3[i0] -> MemRef_ath[i0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 62 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 47 "relation" : "[p_0] -> { Stmt_if_else_3[i0] -> MemRef_tmp157[] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 66 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/polly/test/CodeGen/
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 47 "relation" : "[p_0] -> { Stmt_if_else_3[i0] -> MemRef_tmp157[] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 66 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 36 "relation" : "[p_0] -> { Stmt_if_then_3[i0] -> MemRef_ath[i0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 62 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/polly/test/Isl/CodeGen/
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 36 "relation" : "[p_0] -> { Stmt_if_then_3[i0] -> MemRef_ath[i0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 62 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 47 "relation" : "[p_0] -> { Stmt_if_else_3[i0] -> MemRef_tmp157[] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 66 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/polly/test/Isl/CodeGen/
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 47 "relation" : "[p_0] -> { Stmt_if_else_3[i0] -> MemRef_tmp157[] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 66 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 36 "relation" : "[p_0] -> { Stmt_if_then_3[i0] -> MemRef_ath[i0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 62 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/polly/test/Isl/CodeGen/
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 47 "relation" : "[p_0] -> { Stmt_if_else_3[i0] -> MemRef_tmp157[] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 66 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 36 "relation" : "[p_0] -> { Stmt_if_then_3[i0] -> MemRef_ath[i0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 62 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/polly/test/Isl/CodeGen/
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 47 "relation" : "[p_0] -> { Stmt_if_else_3[i0] -> MemRef_tmp157[] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 66 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 36 "relation" : "[p_0] -> { Stmt_if_then_3[i0] -> MemRef_ath[i0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 62 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/polly/test/Isl/CodeGen/
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 47 "relation" : "[p_0] -> { Stmt_if_else_3[i0] -> MemRef_tmp157[] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 66 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 36 "relation" : "[p_0] -> { Stmt_if_then_3[i0] -> MemRef_ath[i0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 62 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/polly/test/Isl/CodeGen/
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 47 "relation" : "[p_0] -> { Stmt_if_else_3[i0] -> MemRef_tmp157[] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 66 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 36 "relation" : "[p_0] -> { Stmt_if_then_3[i0] -> MemRef_ath[i0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 62 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/polly/test/Isl/CodeGen/
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 47 "relation" : "[p_0] -> { Stmt_if_else_3[i0] -> MemRef_tmp157[] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 66 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
H A D	load_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed	14 "context" : "[p_0] -> { : 0 <= p_0 <= 16 }", 28 "domain" : "[p_0] -> { Stmt_for_cond7_preheader[i0] : 0 <= i0 <= 55 }", 30 "schedule" : "[p_0] -> { Stmt_for_cond7_preheader[i0] -> [i0, 0] }" 36 "relation" : "[p_0] -> { Stmt_if_then_3[i0] -> MemRef_ath[i0] }" 39 "domain" : "[p_0] -> { Stmt_if_then_3[i0] : 0 <= i0 <= 84 - 4p_0 and i0 <= 55 }", 41 "schedule" : "[p_0] -> { Stmt_if_then_3[i0] -> [i0, 2] }" 54 "domain" : "[p_0] -> { Stmt_if_else_3[i0] : 85 - 4p_0 <= i0 <= 55 }", 56 "schedule" : "[p_0] -> { Stmt_if_else_3[i0] -> [i0, 1] }" 62 "relation" : "[p_0] -> { Stmt_for_inc_3[i0] -> MemRef_ath[i0] }" 69 "domain" : "[p_0] -> { Stmt_for_inc_3[i0] : 0 <= i0 <= 55 }", [all …]
/dports/graphics/dynamechs/dynamechs_4.0pre1/dm/
H A D	dmStaticRootLink.cpp	`60 p_inboard[0] = p_0[0]; in rtxToInboard() 61 p_inboard[1] = p_0[1]; in rtxToInboard() 62 p_inboard[2] = p_0[2]; in rtxToInboard() 73 p_0[0] = p_inboard[0]; in rtxFromInboard() 74 p_0[1] = p_inboard[1]; in rtxFromInboard() 75 p_0[2] = p_inboard[2]; in rtxFromInboard() 86 p_inboard[0] = p_0[0]; in stxToInboard() 87 p_inboard[1] = p_0[1]; in stxToInboard() 88 p_inboard[2] = p_0[2]; in stxToInboard() 90 p_inboard[3] = p_0[3]; in stxToInboard() [all …]`
H A D	dmZScrewTxLink.cpp	92 p_inboard[0] = p_0[0]m_ctheta - p_0[1]m_stheta; in rtxToInboard() 93 p_inboard[1] = p_0[1]m_ctheta + p_0[0]m_stheta; in rtxToInboard() 94 p_inboard[2] = p_0[2]; in rtxToInboard() 108 p_0[2] = p_inboard[2]; in rtxFromInboard() 122 tmpa = p_0[0] - m_dMDHp_0[4]; in stxToInboard() 123 tmpb = p_0[1] + m_dMDHp_0[3]; in stxToInboard() 127 p_inboard[2] = p_0[2]; in stxToInboard() 129 p_inboard[3] = p_0[3]m_ctheta - p_0[4]m_stheta; in stxToInboard() 130 p_inboard[4] = p_0[4]m_ctheta + p_0[3]m_stheta; in stxToInboard() 131 p_inboard[5] = p_0[5]; in stxToInboard() [all …]
/dports/science/py-dipy/dipy-1.4.1/dipy/boots/
H A D	resampling.py	`120 p_0 = np.ones(x.shape) / n 149 def __calc_z0(x, p_0, statistic, eps, a_hat, sigma_hat): argument 162 tt_dot[i] = __tt_dot(i, x, p_0, statistic, eps) 168 2 * __tt(x, p_0, statistic)) / eps**2 172 def __tt(x, p_0, statistic=bs_se): argument 193 return statistic(x / p_0) 196 def __tt_dot(i, x, p_0, statistic, eps): argument 203 __tt(x, p_0, statistic)) / eps) 206 def __tt_dot_dot(i, x, p_0, statistic, eps): argument 212 return (__tt_dot(i, x, p_0, statistic, eps) / eps + [all …]`
/dports/math/cvc4/CVC4-1.7/test/unit/api/
H A D	term_black.h	90 TS_ASSERT_THROWS_NOTHING(p_0.getKind()); in testGetKind() 133 TS_ASSERT_THROWS_NOTHING(p_0.getSort()); in testGetSort() 134 TS_ASSERT(p_0.getSort() == boolSort); in testGetSort() 171 TS_ASSERT_THROWS_NOTHING(p_0.notTerm()); in testNotTerm() 220 TS_ASSERT_THROWS_NOTHING(p_0.andTerm(b)); in testAndTerm() 227 TS_ASSERT_THROWS_NOTHING(p_0.andTerm(p_0)); in testAndTerm() 284 TS_ASSERT_THROWS_NOTHING(p_0.orTerm(b)); in testOrTerm() 291 TS_ASSERT_THROWS_NOTHING(p_0.orTerm(p_0)); in testOrTerm() 355 TS_ASSERT_THROWS_NOTHING(p_0.xorTerm(p_0)); in testXorTerm() 419 TS_ASSERT_THROWS_NOTHING(p_0.eqTerm(p_0)); in testEqTerm() [all …]
/dports/lang/racket-minimal/racket-8.3/src/cs/schemified/
H A D	schemify.scm	7156 (let ((p_0 (unwrap e_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 7450 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 8598 (let ((p_0 (unwrap e_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 8830 (let ((p_0 (unwrap e_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 9627 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 10059 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 10278 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 11514 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 11589 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 12401 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) [all …]
/dports/lang/racket/racket-8.3/src/cs/schemified/
H A D	schemify.scm	7156 (let ((p_0 (unwrap e_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 7450 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 8598 (let ((p_0 (unwrap e_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 8830 (let ((p_0 (unwrap e_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 9627 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 10059 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 10278 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 11514 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 11589 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) 12401 (let ((p_0 (unwrap v_0))) (if (pair? p_0) (unwrap (car p_0)) #f)))) [all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/polly/test/ScopInfo/
H A D	stmt_with_read_but_without_sideffect.ll	73 ; CHECK-NEXT: [p_0] -> { Stmt_for_cond7_preheader[i0] -> MemRef_ATH[4p_0 + i0] }; 79 ; CHECK-NEXT: [p_0] -> { Stmt_if_then_1[i0] -> MemRef_ATH[1 + 4p_0 + i0] }; 81 ; CHECK-NEXT: [p_0] -> { Stmt_if_then_1[i0] -> MemRef_tmp21[] }; 82 ; CHECK-NEXT: new: [p_0] -> { Stmt_if_then_1[i0] -> MemRef_ath[i0] }; 84 ; CHECK-NEXT: [p_0] -> { Stmt_if_then_1[i0] -> MemRef_min_1_1__phi[] }; 85 ; CHECK-NEXT: new: [p_0] -> { Stmt_if_then_1[i0] -> MemRef_ath[i0] }; 89 ; CHECK-NEXT: new: [p_0] -> { Stmt_if_else_1_last[i0] -> MemRef_ath[i0] : p_0 <= 5764607… 93 ; CHECK-NEXT: new: [p_0] -> { Stmt_for_inc_1[i0] -> MemRef_ath[i0] }; 95 ; CHECK-NEXT: [p_0] -> { Stmt_for_inc_1[i0] -> MemRef_ATH[0] }; 97 ; CHECK-NEXT: [p_0] -> { Stmt_for_inc_1[i0] -> MemRef_ATH[0] }; [all …]

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