| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1055 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool AbsMod = false);
1951 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2025 Res = parseRegOrImm(Operands, Abs); in parseRegOrImmWithFPInputMods()
2087 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
3258 ResTy = parseRegOrImm(Operands); in parseOperand()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1058 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool AbsMod = false);
1954 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2028 Res = parseRegOrImm(Operands, Abs); in parseRegOrImmWithFPInputMods()
2090 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
3266 ResTy = parseRegOrImm(Operands); in parseOperand()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1306 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2597 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2735 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
2774 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
4875 return parseRegOrImm(Operands); in parseOperand()
5329 Res = parseRegOrImm(Operands); in parseFORMAT()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1311 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2628 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2766 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
2805 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
4905 return parseRegOrImm(Operands); in parseOperand()
5346 Res = parseRegOrImm(Operands); in parseFORMAT()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1311 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2628 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2766 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
2805 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
4905 return parseRegOrImm(Operands); in parseOperand()
5346 Res = parseRegOrImm(Operands); in parseFORMAT()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 849 let ParserMethod = "parseRegOrImm";
912 let ParserMethod = "parseRegOrImm";
919 let ParserMethod = "parseRegOrImm";
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1470 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2823 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2961 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
3000 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
5348 return parseRegOrImm(Operands); in parseOperand()
5834 Res = parseRegOrImm(Operands); in parseFORMAT()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1470 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2823 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2961 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
3000 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
5348 return parseRegOrImm(Operands); in parseOperand()
5834 Res = parseRegOrImm(Operands); in parseFORMAT()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1470 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2823 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2961 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
3000 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
5348 return parseRegOrImm(Operands); in parseOperand()
5834 Res = parseRegOrImm(Operands); in parseFORMAT()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1470 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2841 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2979 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
3018 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
5370 return parseRegOrImm(Operands); in parseOperand()
5856 Res = parseRegOrImm(Operands); in parseFORMAT()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1470 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2823 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2961 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
3000 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
5348 return parseRegOrImm(Operands); in parseOperand()
5834 Res = parseRegOrImm(Operands); in parseFORMAT()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1470 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2823 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2961 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
3000 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
5348 return parseRegOrImm(Operands); in parseOperand()
5834 Res = parseRegOrImm(Operands); in parseFORMAT()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1273 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2425 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2563 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
2602 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
4496 return parseRegOrImm(Operands); in parseOperand()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1292 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2502 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2640 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
2679 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
4649 return parseRegOrImm(Operands); in parseOperand()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1273 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2425 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2563 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
2602 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
4496 return parseRegOrImm(Operands); in parseOperand()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1292 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2502 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2640 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
2679 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
4649 return parseRegOrImm(Operands); in parseOperand()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1273 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2425 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2563 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
2602 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
4496 return parseRegOrImm(Operands); in parseOperand()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1251 OperandMatchResultTy parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false);
2347 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm() function in AMDGPUAsmParser
2485 Res = parseRegOrImm(Operands, SP3Abs); in parseRegOrImmWithFPInputMods()
2524 Res = parseRegOrImm(Operands); in parseRegOrImmWithIntInputMods()
4338 return parseRegOrImm(Operands); in parseOperand()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 844 let ParserMethod = "parseRegOrImm";
907 let ParserMethod = "parseRegOrImm";
914 let ParserMethod = "parseRegOrImm";
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 1219 let ParserMethod = "parseRegOrImm";
1282 let ParserMethod = "parseRegOrImm";
1289 let ParserMethod = "parseRegOrImm";
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 1219 let ParserMethod = "parseRegOrImm";
1282 let ParserMethod = "parseRegOrImm";
1289 let ParserMethod = "parseRegOrImm";
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 1038 let ParserMethod = "parseRegOrImm";
1101 let ParserMethod = "parseRegOrImm";
1108 let ParserMethod = "parseRegOrImm";
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 1219 let ParserMethod = "parseRegOrImm";
1282 let ParserMethod = "parseRegOrImm";
1289 let ParserMethod = "parseRegOrImm";
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 1216 let ParserMethod = "parseRegOrImm";
1279 let ParserMethod = "parseRegOrImm";
1286 let ParserMethod = "parseRegOrImm";
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 1173 let ParserMethod = "parseRegOrImm";
1236 let ParserMethod = "parseRegOrImm";
1243 let ParserMethod = "parseRegOrImm";
|