Home
last modified time | relevance | path

Searched refs:pcie_mlw_mask (Results 1 – 21 of 21) sorted by relevance

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_device.c4990 adev->pm.pcie_mlw_mask = amdgpu_pcie_lane_cap; in amdgpu_device_get_pcie_info()
4996 if (adev->pm.pcie_mlw_mask == 0) in amdgpu_device_get_pcie_info()
4997 adev->pm.pcie_mlw_mask = AMDGPU_DEFAULT_PCIE_MLW_MASK; in amdgpu_device_get_pcie_info()
5001 if (adev->pm.pcie_gen_mask && adev->pm.pcie_mlw_mask) in amdgpu_device_get_pcie_info()
5065 if (adev->pm.pcie_mlw_mask == 0) { in amdgpu_device_get_pcie_info()
5067 adev->pm.pcie_mlw_mask |= AMDGPU_DEFAULT_PCIE_MLW_MASK; in amdgpu_device_get_pcie_info()
5071 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 | in amdgpu_device_get_pcie_info()
5095 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | in amdgpu_device_get_pcie_info()
5101 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | in amdgpu_device_get_pcie_info()
5106 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | in amdgpu_device_get_pcie_info()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_device.c4990 adev->pm.pcie_mlw_mask = amdgpu_pcie_lane_cap; in amdgpu_device_get_pcie_info()
4996 if (adev->pm.pcie_mlw_mask == 0) in amdgpu_device_get_pcie_info()
4997 adev->pm.pcie_mlw_mask = AMDGPU_DEFAULT_PCIE_MLW_MASK; in amdgpu_device_get_pcie_info()
5001 if (adev->pm.pcie_gen_mask && adev->pm.pcie_mlw_mask) in amdgpu_device_get_pcie_info()
5065 if (adev->pm.pcie_mlw_mask == 0) { in amdgpu_device_get_pcie_info()
5067 adev->pm.pcie_mlw_mask |= AMDGPU_DEFAULT_PCIE_MLW_MASK; in amdgpu_device_get_pcie_info()
5071 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 | in amdgpu_device_get_pcie_info()
5095 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | in amdgpu_device_get_pcie_info()
5101 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | in amdgpu_device_get_pcie_info()
5106 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | in amdgpu_device_get_pcie_info()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_device.c4990 adev->pm.pcie_mlw_mask = amdgpu_pcie_lane_cap; in amdgpu_device_get_pcie_info()
4996 if (adev->pm.pcie_mlw_mask == 0) in amdgpu_device_get_pcie_info()
4997 adev->pm.pcie_mlw_mask = AMDGPU_DEFAULT_PCIE_MLW_MASK; in amdgpu_device_get_pcie_info()
5001 if (adev->pm.pcie_gen_mask && adev->pm.pcie_mlw_mask) in amdgpu_device_get_pcie_info()
5065 if (adev->pm.pcie_mlw_mask == 0) { in amdgpu_device_get_pcie_info()
5067 adev->pm.pcie_mlw_mask |= AMDGPU_DEFAULT_PCIE_MLW_MASK; in amdgpu_device_get_pcie_info()
5071 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 | in amdgpu_device_get_pcie_info()
5095 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | in amdgpu_device_get_pcie_info()
5101 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | in amdgpu_device_get_pcie_info()
5106 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | in amdgpu_device_get_pcie_info()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c1189 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in smu_smc_hw_setup()
1191 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in smu_smc_hw_setup()
1193 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in smu_smc_hw_setup()
1195 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in smu_smc_hw_setup()
1197 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in smu_smc_hw_setup()
1199 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu_smc_hw_setup()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c1189 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in smu_smc_hw_setup()
1191 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in smu_smc_hw_setup()
1193 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in smu_smc_hw_setup()
1195 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in smu_smc_hw_setup()
1197 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in smu_smc_hw_setup()
1199 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu_smc_hw_setup()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c1189 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in smu_smc_hw_setup()
1191 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in smu_smc_hw_setup()
1193 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in smu_smc_hw_setup()
1195 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in smu_smc_hw_setup()
1197 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in smu_smc_hw_setup()
1199 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu_smc_hw_setup()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c504 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in vega12_override_pcie_parameters()
506 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in vega12_override_pcie_parameters()
508 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega12_override_pcie_parameters()
510 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in vega12_override_pcie_parameters()
512 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in vega12_override_pcie_parameters()
514 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega12_override_pcie_parameters()
H A Dvega20_hwmgr.c849 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in vega20_override_pcie_parameters()
851 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in vega20_override_pcie_parameters()
853 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega20_override_pcie_parameters()
855 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in vega20_override_pcie_parameters()
857 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in vega20_override_pcie_parameters()
859 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega20_override_pcie_parameters()
H A Dsmu7_hwmgr.c616 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in smu7_override_pcie_width()
618 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in smu7_override_pcie_width()
620 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in smu7_override_pcie_width()
622 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in smu7_override_pcie_width()
624 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in smu7_override_pcie_width()
626 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu7_override_pcie_width()
2944 data->pcie_lane_cap = adev->pm.pcie_mlw_mask; in smu7_hwmgr_backend_init()
H A Dvega10_hwmgr.c1528 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in vega10_override_pcie_parameters()
1530 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in vega10_override_pcie_parameters()
1532 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega10_override_pcie_parameters()
1534 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in vega10_override_pcie_parameters()
1536 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in vega10_override_pcie_parameters()
1538 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega10_override_pcie_parameters()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c504 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in vega12_override_pcie_parameters()
506 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in vega12_override_pcie_parameters()
508 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega12_override_pcie_parameters()
510 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in vega12_override_pcie_parameters()
512 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in vega12_override_pcie_parameters()
514 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega12_override_pcie_parameters()
H A Dvega20_hwmgr.c849 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in vega20_override_pcie_parameters()
851 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in vega20_override_pcie_parameters()
853 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega20_override_pcie_parameters()
855 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in vega20_override_pcie_parameters()
857 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in vega20_override_pcie_parameters()
859 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega20_override_pcie_parameters()
H A Dsmu7_hwmgr.c616 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in smu7_override_pcie_width()
618 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in smu7_override_pcie_width()
620 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in smu7_override_pcie_width()
622 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in smu7_override_pcie_width()
624 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in smu7_override_pcie_width()
626 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu7_override_pcie_width()
2944 data->pcie_lane_cap = adev->pm.pcie_mlw_mask; in smu7_hwmgr_backend_init()
H A Dvega10_hwmgr.c1528 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in vega10_override_pcie_parameters()
1530 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in vega10_override_pcie_parameters()
1532 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega10_override_pcie_parameters()
1534 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in vega10_override_pcie_parameters()
1536 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in vega10_override_pcie_parameters()
1538 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega10_override_pcie_parameters()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c504 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in vega12_override_pcie_parameters()
506 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in vega12_override_pcie_parameters()
508 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega12_override_pcie_parameters()
510 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in vega12_override_pcie_parameters()
512 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in vega12_override_pcie_parameters()
514 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega12_override_pcie_parameters()
H A Dvega20_hwmgr.c849 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in vega20_override_pcie_parameters()
851 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in vega20_override_pcie_parameters()
853 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega20_override_pcie_parameters()
855 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in vega20_override_pcie_parameters()
857 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in vega20_override_pcie_parameters()
859 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega20_override_pcie_parameters()
H A Dsmu7_hwmgr.c616 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in smu7_override_pcie_width()
618 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in smu7_override_pcie_width()
620 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in smu7_override_pcie_width()
622 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in smu7_override_pcie_width()
624 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in smu7_override_pcie_width()
626 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu7_override_pcie_width()
2944 data->pcie_lane_cap = adev->pm.pcie_mlw_mask; in smu7_hwmgr_backend_init()
H A Dvega10_hwmgr.c1528 if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) in vega10_override_pcie_parameters()
1530 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) in vega10_override_pcie_parameters()
1532 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega10_override_pcie_parameters()
1534 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) in vega10_override_pcie_parameters()
1536 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) in vega10_override_pcie_parameters()
1538 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega10_override_pcie_parameters()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/inc/
H A Damdgpu_dpm.h443 uint32_t pcie_mlw_mask; member
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/inc/
H A Damdgpu_dpm.h443 uint32_t pcie_mlw_mask; member
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/inc/
H A Damdgpu_dpm.h443 uint32_t pcie_mlw_mask; member