Searched refs:pkt_rx_avail (Results 1 – 7 of 7) sorted by relevance
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/xge/rtl/verilog/ |
| H A D | rx_dequeue.v | 44 pkt_rx_err, pkt_rx_mod, pkt_rx_avail, status_rxdfifo_udflow_tog,
68 output pkt_rx_avail; port
74 reg pkt_rx_avail; register
99 pkt_rx_avail <= 1'b0;
116 pkt_rx_avail <= !rxdfifo_ralmost_empty;
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| H A D | xge_mac_wb.v | 43 pkt_rx_data, pkt_rx_avail,
82 output pkt_rx_avail; // From rx_dq0 of rx_dequeue.v port
137 .pkt_rx_avail (pkt_rx_avail),
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| H A D | xge_mac.v | 43 pkt_rx_data, pkt_rx_avail,
75 output pkt_rx_avail; // From rx_dq0 of rx_dequeue.v port
179 .pkt_rx_avail (pkt_rx_avail),
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| H A D | rx_checker.v | 27 input pkt_rx_avail, port
85 else if (pkt_rx_avail)
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/xge_interface/ |
| H A D | xge_handshake.v | 20 input pkt_rx_avail, port
40 if (pkt_rx_avail) begin
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| H A D | xge_mac_wrapper.v | 152 .pkt_rx_avail (eth_rx_avail),
204 .pkt_rx_avail (eth_rx_avail),
256 .pkt_rx_avail(eth_rx_avail),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/xge/tbench/verilog/ |
| H A D | tb_xge_mac.v | 72 wire pkt_rx_avail; // From dut of xge_mac.v net
106 .pkt_rx_avail (pkt_rx_avail),
503 if (pkt_rx_avail) begin
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