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Searched refs:pll_ctl (Results 1 – 25 of 167) sorted by relevance

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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dclocks.c18 u_long pll_ctl = bfin_read_PLL_CTL(); in get_vco() local
19 if (pll_ctl == cached_vco_pll_ctl) in get_vco()
22 cached_vco_pll_ctl = pll_ctl; in get_vco()
24 msel = (pll_ctl >> 9) & 0x3F; in get_vco()
29 cached_vco >>= (1 & pll_ctl); /* DF bit */ in get_vco()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dclocks.c18 u_long pll_ctl = bfin_read_PLL_CTL(); in get_vco() local
19 if (pll_ctl == cached_vco_pll_ctl) in get_vco()
22 cached_vco_pll_ctl = pll_ctl; in get_vco()
24 msel = (pll_ctl >> 9) & 0x3F; in get_vco()
29 cached_vco >>= (1 & pll_ctl); /* DF bit */ in get_vco()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dclocks.c18 u_long pll_ctl = bfin_read_PLL_CTL(); in get_vco() local
19 if (pll_ctl == cached_vco_pll_ctl) in get_vco()
22 cached_vco_pll_ctl = pll_ctl; in get_vco()
24 msel = (pll_ctl >> 9) & 0x3F; in get_vco()
29 cached_vco >>= (1 & pll_ctl); /* DF bit */ in get_vco()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dclocks.c18 u_long pll_ctl = bfin_read_PLL_CTL(); in get_vco() local
19 if (pll_ctl == cached_vco_pll_ctl) in get_vco()
22 cached_vco_pll_ctl = pll_ctl; in get_vco()
24 msel = (pll_ctl >> 9) & 0x3F; in get_vco()
29 cached_vco >>= (1 & pll_ctl); /* DF bit */ in get_vco()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dclocks.c18 u_long pll_ctl = bfin_read_PLL_CTL(); in get_vco() local
19 if (pll_ctl == cached_vco_pll_ctl) in get_vco()
22 cached_vco_pll_ctl = pll_ctl; in get_vco()
24 msel = (pll_ctl >> 9) & 0x3F; in get_vco()
29 cached_vco >>= (1 & pll_ctl); /* DF bit */ in get_vco()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dclocks.c18 u_long pll_ctl = bfin_read_PLL_CTL(); in get_vco() local
19 if (pll_ctl == cached_vco_pll_ctl) in get_vco()
22 cached_vco_pll_ctl = pll_ctl; in get_vco()
24 msel = (pll_ctl >> 9) & 0x3F; in get_vco()
29 cached_vco >>= (1 & pll_ctl); /* DF bit */ in get_vco()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dclocks.c18 u_long pll_ctl = bfin_read_PLL_CTL(); in get_vco() local
19 if (pll_ctl == cached_vco_pll_ctl) in get_vco()
22 cached_vco_pll_ctl = pll_ctl; in get_vco()
24 msel = (pll_ctl >> 9) & 0x3F; in get_vco()
29 cached_vco >>= (1 & pll_ctl); /* DF bit */ in get_vco()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/lib/
H A Dclocks.c17 u_long msel, pll_ctl; in get_vco() local
19 pll_ctl = bfin_read_PLL_CTL(); in get_vco()
20 if (pll_ctl == cached_vco_pll_ctl) in get_vco()
23 cached_vco_pll_ctl = pll_ctl; in get_vco()
25 msel = (pll_ctl & MSEL) >> MSEL_P; in get_vco()
30 cached_vco >>= (pll_ctl & DF); in get_vco()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/
H A Dclock.h44 uint32_t msel, pll_ctl, vco; in early_get_uart_clk() local
47 pll_ctl = bfin_read_PLL_CTL(); in early_get_uart_clk()
48 msel = (pll_ctl & MSEL) >> MSEL_P; in early_get_uart_clk()
52 vco = (CONFIG_CLKIN_HZ >> (pll_ctl & DF)) * msel; in early_get_uart_clk()
/dports/devel/avr-gdb/gdb-7.3.1/sim/bfin/
H A Ddv-bfin_pll.c33 bu16 BFIN_MMR_16(pll_ctl);
42 #define mmr_base() offsetof(struct bfin_pll, pll_ctl)
171 pll->pll_ctl = 0x1400; in bfin_pll_finish()
179 pll->pll_ctl = 0xa800; in bfin_pll_finish()
/dports/devel/gdb761/gdb-7.6.1/sim/bfin/
H A Ddv-bfin_pll.c33 bu16 BFIN_MMR_16(pll_ctl);
42 #define mmr_base() offsetof(struct bfin_pll, pll_ctl)
171 pll->pll_ctl = 0x1400; in bfin_pll_finish()
179 pll->pll_ctl = 0xa800; in bfin_pll_finish()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/i915/display/
H A Dvlv_dsi_pll.c264 u32 pll_ctl, pll_div; in vlv_dsi_get_pclk() local
272 pll_ctl = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL); in vlv_dsi_get_pclk()
276 config->dsi_pll.ctrl = pll_ctl & ~DSI_PLL_LOCK; in vlv_dsi_get_pclk()
280 pll_ctl &= DSI_PLL_P1_POST_DIV_MASK; in vlv_dsi_get_pclk()
281 pll_ctl = pll_ctl >> (DSI_PLL_P1_POST_DIV_SHIFT - 2); in vlv_dsi_get_pclk()
291 while (pll_ctl) { in vlv_dsi_get_pclk()
292 pll_ctl = pll_ctl >> 1; in vlv_dsi_get_pclk()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/i915/display/
H A Dvlv_dsi_pll.c264 u32 pll_ctl, pll_div; in vlv_dsi_get_pclk() local
272 pll_ctl = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL); in vlv_dsi_get_pclk()
276 config->dsi_pll.ctrl = pll_ctl & ~DSI_PLL_LOCK; in vlv_dsi_get_pclk()
280 pll_ctl &= DSI_PLL_P1_POST_DIV_MASK; in vlv_dsi_get_pclk()
281 pll_ctl = pll_ctl >> (DSI_PLL_P1_POST_DIV_SHIFT - 2); in vlv_dsi_get_pclk()
291 while (pll_ctl) { in vlv_dsi_get_pclk()
292 pll_ctl = pll_ctl >> 1; in vlv_dsi_get_pclk()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/i915/display/
H A Dvlv_dsi_pll.c264 u32 pll_ctl, pll_div; in vlv_dsi_get_pclk() local
272 pll_ctl = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL); in vlv_dsi_get_pclk()
276 config->dsi_pll.ctrl = pll_ctl & ~DSI_PLL_LOCK; in vlv_dsi_get_pclk()
280 pll_ctl &= DSI_PLL_P1_POST_DIV_MASK; in vlv_dsi_get_pclk()
281 pll_ctl = pll_ctl >> (DSI_PLL_P1_POST_DIV_SHIFT - 2); in vlv_dsi_get_pclk()
291 while (pll_ctl) { in vlv_dsi_get_pclk()
292 pll_ctl = pll_ctl >> 1; in vlv_dsi_get_pclk()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/ata/
H A Dpata_pdc2027x.c515 u16 pll_ctl; in pdc_adjust_pll() local
533 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
535 PDPRINTK("pll_ctl[%X]\n", pll_ctl); in pdc_adjust_pll()
569 pll_ctl = (R << 8) | F; in pdc_adjust_pll()
571 PDPRINTK("Writing pll_ctl[%X]\n", pll_ctl); in pdc_adjust_pll()
573 iowrite16(pll_ctl, mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
584 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
586 PDPRINTK("pll_ctl[%X]\n", pll_ctl); in pdc_adjust_pll()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/ata/
H A Dpata_pdc2027x.c515 u16 pll_ctl; in pdc_adjust_pll() local
533 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
535 PDPRINTK("pll_ctl[%X]\n", pll_ctl); in pdc_adjust_pll()
569 pll_ctl = (R << 8) | F; in pdc_adjust_pll()
571 PDPRINTK("Writing pll_ctl[%X]\n", pll_ctl); in pdc_adjust_pll()
573 iowrite16(pll_ctl, mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
584 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
586 PDPRINTK("pll_ctl[%X]\n", pll_ctl); in pdc_adjust_pll()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/ata/
H A Dpata_pdc2027x.c515 u16 pll_ctl; in pdc_adjust_pll() local
533 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
535 PDPRINTK("pll_ctl[%X]\n", pll_ctl); in pdc_adjust_pll()
569 pll_ctl = (R << 8) | F; in pdc_adjust_pll()
571 PDPRINTK("Writing pll_ctl[%X]\n", pll_ctl); in pdc_adjust_pll()
573 iowrite16(pll_ctl, mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
584 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
586 PDPRINTK("pll_ctl[%X]\n", pll_ctl); in pdc_adjust_pll()
/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/soc/codecs/
H A Dtscs42xx.c947 struct pll_ctl { struct
973 static const struct pll_ctl pll_ctls[] = {
1048 const struct pll_ctl *pll_ctl = NULL; in get_pll_ctl() local
1052 pll_ctl = &pll_ctls[i]; in get_pll_ctl()
1056 return pll_ctl; in get_pll_ctl()
1064 const struct pll_ctl *pll_ctl; in set_pll_ctl_from_input_freq() local
1066 pll_ctl = get_pll_ctl(input_freq); in set_pll_ctl_from_input_freq()
1067 if (!pll_ctl) { in set_pll_ctl_from_input_freq()
1076 pll_ctl->settings[i].addr, in set_pll_ctl_from_input_freq()
1077 pll_ctl->settings[i].mask, in set_pll_ctl_from_input_freq()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/sound/soc/codecs/
H A Dtscs42xx.c947 struct pll_ctl { struct
973 static const struct pll_ctl pll_ctls[] = {
1048 const struct pll_ctl *pll_ctl = NULL; in get_pll_ctl() local
1052 pll_ctl = &pll_ctls[i]; in get_pll_ctl()
1056 return pll_ctl; in get_pll_ctl()
1064 const struct pll_ctl *pll_ctl; in set_pll_ctl_from_input_freq() local
1066 pll_ctl = get_pll_ctl(input_freq); in set_pll_ctl_from_input_freq()
1067 if (!pll_ctl) { in set_pll_ctl_from_input_freq()
1076 pll_ctl->settings[i].addr, in set_pll_ctl_from_input_freq()
1077 pll_ctl->settings[i].mask, in set_pll_ctl_from_input_freq()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/sound/soc/codecs/
H A Dtscs42xx.c947 struct pll_ctl { struct
973 static const struct pll_ctl pll_ctls[] = {
1048 const struct pll_ctl *pll_ctl = NULL; in get_pll_ctl() local
1052 pll_ctl = &pll_ctls[i]; in get_pll_ctl()
1056 return pll_ctl; in get_pll_ctl()
1064 const struct pll_ctl *pll_ctl; in set_pll_ctl_from_input_freq() local
1066 pll_ctl = get_pll_ctl(input_freq); in set_pll_ctl_from_input_freq()
1067 if (!pll_ctl) { in set_pll_ctl_from_input_freq()
1076 pll_ctl->settings[i].addr, in set_pll_ctl_from_input_freq()
1077 pll_ctl->settings[i].mask, in set_pll_ctl_from_input_freq()
[all …]
/dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/video/
H A Dexynos_dp_lowlevel.c134 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_param()
275 reg = readl(&dp_regs->pll_ctl); in exynos_dp_set_pll_power()
281 writel(reg, &dp_regs->pll_ctl); in exynos_dp_set_pll_power()
301 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
303 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
308 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
310 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/video/exynos/
H A Dexynos_dp_lowlevel.c116 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_param()
259 reg = readl(&dp_regs->pll_ctl); in exynos_dp_set_pll_power()
265 writel(reg, &dp_regs->pll_ctl); in exynos_dp_set_pll_power()
285 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
287 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
292 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
294 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/video/exynos/
H A Dexynos_dp_lowlevel.c114 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_param()
257 reg = readl(&dp_regs->pll_ctl); in exynos_dp_set_pll_power()
263 writel(reg, &dp_regs->pll_ctl); in exynos_dp_set_pll_power()
283 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
285 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
290 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
292 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/video/exynos/
H A Dexynos_dp_lowlevel.c114 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_param()
257 reg = readl(&dp_regs->pll_ctl); in exynos_dp_set_pll_power()
263 writel(reg, &dp_regs->pll_ctl); in exynos_dp_set_pll_power()
283 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
285 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
290 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
292 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/video/exynos/
H A Dexynos_dp_lowlevel.c116 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_param()
259 reg = readl(&dp_regs->pll_ctl); in exynos_dp_set_pll_power()
265 writel(reg, &dp_regs->pll_ctl); in exynos_dp_set_pll_power()
285 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
287 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
292 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
294 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()

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