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Searched refs:pll_output (Results 1 – 25 of 75) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/ide/
H A Dpdc202xx_new.c303 long pll_input, pll_output, ratio; in init_chipset_pdcnew() local
317 pll_output = 133333333; in init_chipset_pdcnew()
321 pll_output = 100000000; in init_chipset_pdcnew()
344 DBG("pll_output is %ld Hz\n", pll_output); in init_chipset_pdcnew()
361 ratio = pll_output / (pll_input / 1000); in init_chipset_pdcnew()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/ide/
H A Dpdc202xx_new.c303 long pll_input, pll_output, ratio; in init_chipset_pdcnew() local
317 pll_output = 133333333; in init_chipset_pdcnew()
321 pll_output = 100000000; in init_chipset_pdcnew()
344 DBG("pll_output is %ld Hz\n", pll_output); in init_chipset_pdcnew()
361 ratio = pll_output / (pll_input / 1000); in init_chipset_pdcnew()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/ide/
H A Dpdc202xx_new.c303 long pll_input, pll_output, ratio; in init_chipset_pdcnew() local
317 pll_output = 133333333; in init_chipset_pdcnew()
321 pll_output = 100000000; in init_chipset_pdcnew()
344 DBG("pll_output is %ld Hz\n", pll_output); in init_chipset_pdcnew()
361 ratio = pll_output / (pll_input / 1000); in init_chipset_pdcnew()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomfwctrl.c252 struct compute_gpu_clock_output_parameter_v1_8 *pll_output; in pp_atomfwctrl_get_gpu_pll_dividers_vega10() local
264 pll_output = (struct compute_gpu_clock_output_parameter_v1_8 *) in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
266 dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
267 dividers->ulDid = le32_to_cpu(pll_output->dfs_did); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
268 dividers->ulPll_fb_mult = le32_to_cpu(pll_output->pll_fb_mult); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
269 dividers->ulPll_ss_fbsmult = le32_to_cpu(pll_output->pll_ss_fbsmult); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
270 dividers->usPll_ss_slew_frac = le16_to_cpu(pll_output->pll_ss_slew_frac); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
271 dividers->ucPll_ss_enable = pll_output->pll_ss_enable; in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomfwctrl.c252 struct compute_gpu_clock_output_parameter_v1_8 *pll_output; in pp_atomfwctrl_get_gpu_pll_dividers_vega10() local
264 pll_output = (struct compute_gpu_clock_output_parameter_v1_8 *) in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
266 dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
267 dividers->ulDid = le32_to_cpu(pll_output->dfs_did); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
268 dividers->ulPll_fb_mult = le32_to_cpu(pll_output->pll_fb_mult); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
269 dividers->ulPll_ss_fbsmult = le32_to_cpu(pll_output->pll_ss_fbsmult); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
270 dividers->usPll_ss_slew_frac = le16_to_cpu(pll_output->pll_ss_slew_frac); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
271 dividers->ucPll_ss_enable = pll_output->pll_ss_enable; in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomfwctrl.c252 struct compute_gpu_clock_output_parameter_v1_8 *pll_output; in pp_atomfwctrl_get_gpu_pll_dividers_vega10() local
264 pll_output = (struct compute_gpu_clock_output_parameter_v1_8 *) in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
266 dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
267 dividers->ulDid = le32_to_cpu(pll_output->dfs_did); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
268 dividers->ulPll_fb_mult = le32_to_cpu(pll_output->pll_fb_mult); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
269 dividers->ulPll_ss_fbsmult = le32_to_cpu(pll_output->pll_ss_fbsmult); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
270 dividers->usPll_ss_slew_frac = le16_to_cpu(pll_output->pll_ss_slew_frac); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
271 dividers->ucPll_ss_enable = pll_output->pll_ss_enable; in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/ata/
H A Dahci_da850.c46 u32 pll_output = 1500000000, needed; in ahci_da850_calculate_mpy() local
57 needed = pll_output / (refclk_rate / 10); in ahci_da850_calculate_mpy()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/ata/
H A Dahci_da850.c46 u32 pll_output = 1500000000, needed; in ahci_da850_calculate_mpy() local
57 needed = pll_output / (refclk_rate / 10); in ahci_da850_calculate_mpy()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/ata/
H A Dahci_da850.c46 u32 pll_output = 1500000000, needed; in ahci_da850_calculate_mpy() local
57 needed = pll_output / (refclk_rate / 10); in ahci_da850_calculate_mpy()
/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/soc/codecs/
H A Dcx2072x.c589 unsigned int pll_output; in cx2072x_config_pll() local
623 pll_output = sample_rate * 3072; in cx2072x_config_pll()
624 int_div = pll_output / pll_input; in cx2072x_config_pll()
625 frac_div = pll_output - (int_div * pll_input); in cx2072x_config_pll()
/dports/multimedia/libv4l/linux-5.13-rc2/sound/soc/codecs/
H A Dcx2072x.c589 unsigned int pll_output; in cx2072x_config_pll() local
623 pll_output = sample_rate * 3072; in cx2072x_config_pll()
624 int_div = pll_output / pll_input; in cx2072x_config_pll()
625 frac_div = pll_output - (int_div * pll_input); in cx2072x_config_pll()
/dports/multimedia/v4l-utils/linux-5.13-rc2/sound/soc/codecs/
H A Dcx2072x.c589 unsigned int pll_output; in cx2072x_config_pll() local
623 pll_output = sample_rate * 3072; in cx2072x_config_pll()
624 int_div = pll_output / pll_input; in cx2072x_config_pll()
625 frac_div = pll_output - (int_div * pll_input); in cx2072x_config_pll()
/dports/cad/openroad/OpenROAD-2.0/src/sta/tcl/
H A DSdc.tcl1135 [-pll_output pll_out_pin] [-pll_feedback pll_fdbk_pin]\
1141 -duty_cycle -edges -edge_shift -pll_output -pll_feedback -comment} \
1260 if { [info exists keys(-pll_feedback)] || [info exists keys(-pll_output)] } {
1261 if {![info exists keys(-pll_output)] } {
1268 set pll_out [get_pin_error "-pll_output" $keys(-pll_output)]
/dports/sysutils/u-boot-tools/u-boot-2020.07/drivers/clk/
H A Dclk_stm32mp1.c1351 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1531 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
1806 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/clk/
H A Dclk_stm32mp1.c1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output() function
1747 pll_output(priv, pll_id, pllcfg[PLLCFG_O]); in pll_set_rate()
2041 pll_output(priv, i, pllcfg[i][PLLCFG_O]); in stm32mp1_clktree()

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