| /dports/math/libpgmath/flang-d07daf3/test/f90_correct/inc/ |
| H A D | pp22.mk | 20 pp22: run
23 build: $(SRC)/pp22.f90
24 -$(RM) pp22.$(EXESUFFIX) core *.d *.mod FOR*.DAT FTN* ftn* fort.*
27 -$(FC) -c $(FFLAGS) $(LDFLAGS) $(SRC)/pp22.f90 -o pp22.$(OBJX)
28 -$(FC) $(FFLAGS) $(LDFLAGS) pp22.$(OBJX) check.$(OBJX) $(LIBS) -o pp22.$(EXESUFFIX)
32 @echo ------------------------------------ executing test pp22
33 pp22.$(EXESUFFIX)
37 pp22.run: run
|
| /dports/textproc/p5-Regexp-Common/Regexp-Common-2017060201/t/URI/ |
| H A D | tel.t | 21 pass 'tel:+358-555-1234567;postd=pp22';
46 pass 'tel:+358-555-1234567;postd=pp22';
60 fail 'tel:+358-555-1234567;phone-context=+1234;postd=pp22';
|
| H A D | fax.t | 21 pass 'fax:+358-555-1234567;postd=pp22';
54 pass 'fax:+358-555-1234567;postd=pp22';
68 fail 'fax:+358-555-1234567;phone-context=+1234;postd=pp22';
|
| /dports/chinese/rime-ipa/rime-ipa-22b71710e029bcb412e9197192a638ab11bc2abf/ |
| H A D | ipa_yunlong.dict.yaml | 582 ꜕ pp22
|
| /dports/textproc/py-rdflib/rdflib-5.0.0/test/DAWG/data-sparql11/property-path/ |
| H A D | manifest.ttl | 31 # :pp22 # removed by 3LC
237 :pp22 rdf:type mf:QueryEvaluationTest ;
240 mf:name "(pp22) Diamond, with tail -- :p{3}" ;
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_main.c | 208 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
209 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_dma_addr_set()
219 return le16_to_cpu(tx_desc->pp22.data_size); in mvpp2_txdesc_size_get()
229 tx_desc->pp22.data_size = cpu_to_le16(size); in mvpp2_txdesc_size_set()
239 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
258 return tx_desc->pp22.packet_offset; in mvpp2_txdesc_offset_get()
287 return le16_to_cpu(rx_desc->pp22.data_size); in mvpp2_rxdesc_size_get()
296 return le32_to_cpu(rx_desc->pp22.status); in mvpp2_rxdesc_status_get()
4038 desc->pp22.ptp_descriptor &= in mvpp2_txdesc_clear_ptp()
4111 tx_desc->pp22.ptp_descriptor &= in mvpp2_tx_hw_tstamp()
[all …]
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_main.c | 208 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
209 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_dma_addr_set()
219 return le16_to_cpu(tx_desc->pp22.data_size); in mvpp2_txdesc_size_get()
229 tx_desc->pp22.data_size = cpu_to_le16(size); in mvpp2_txdesc_size_set()
239 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
258 return tx_desc->pp22.packet_offset; in mvpp2_txdesc_offset_get()
287 return le16_to_cpu(rx_desc->pp22.data_size); in mvpp2_rxdesc_size_get()
296 return le32_to_cpu(rx_desc->pp22.status); in mvpp2_rxdesc_status_get()
4038 desc->pp22.ptp_descriptor &= in mvpp2_txdesc_clear_ptp()
4111 tx_desc->pp22.ptp_descriptor &= in mvpp2_tx_hw_tstamp()
[all …]
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_main.c | 208 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
209 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_dma_addr_set()
219 return le16_to_cpu(tx_desc->pp22.data_size); in mvpp2_txdesc_size_get()
229 tx_desc->pp22.data_size = cpu_to_le16(size); in mvpp2_txdesc_size_set()
239 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
258 return tx_desc->pp22.packet_offset; in mvpp2_txdesc_offset_get()
287 return le16_to_cpu(rx_desc->pp22.data_size); in mvpp2_rxdesc_size_get()
296 return le32_to_cpu(rx_desc->pp22.status); in mvpp2_rxdesc_status_get()
4038 desc->pp22.ptp_descriptor &= in mvpp2_txdesc_clear_ptp()
4111 tx_desc->pp22.ptp_descriptor &= in mvpp2_tx_hw_tstamp()
[all …]
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/net/ |
| H A D | mvpp2.c | 1088 struct mvpp22_tx_desc pp22; member
1095 struct mvpp22_rx_desc pp22; member
1303 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1315 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1325 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1335 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1345 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1363 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1372 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/net/ |
| H A D | mvpp2.c | 1088 struct mvpp22_tx_desc pp22; member
1095 struct mvpp22_rx_desc pp22; member
1303 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1315 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1325 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1335 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1345 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1363 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1372 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/net/ |
| H A D | mvpp2.c | 1088 struct mvpp22_tx_desc pp22; member
1095 struct mvpp22_rx_desc pp22; member
1303 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1315 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1325 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1335 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1345 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1363 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1372 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/net/ |
| H A D | mvpp2.c | 1076 struct mvpp22_tx_desc pp22; member
1083 struct mvpp22_rx_desc pp22; member
1292 tx_desc->pp22.buf_dma_addr_ptp &= ~GENMASK_ULL(40, 0); in mvpp2_txdesc_dma_addr_set()
1293 tx_desc->pp22.buf_dma_addr_ptp |= val; in mvpp2_txdesc_dma_addr_set()
1304 tx_desc->pp22.data_size = size; in mvpp2_txdesc_size_set()
1314 tx_desc->pp22.phys_txq = txq; in mvpp2_txdesc_txq_set()
1324 tx_desc->pp22.command = command; in mvpp2_txdesc_cmd_set()
1334 tx_desc->pp22.packet_offset = offset; in mvpp2_txdesc_offset_set()
1352 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1361 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
[all …]
|