| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 142 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
152 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
155 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
158 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
161 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
165 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
168 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 142 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
152 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
155 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
158 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
161 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
165 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
168 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 142 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
152 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
155 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
158 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
161 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
165 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
168 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 142 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
152 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
155 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
158 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
161 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
165 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
168 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_topology.c | 147 unsigned short pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get() local
160 pri_and_ext_bus_width = BUS_MASK_16BIT; in mv_ddr_bus_bit_mask_get()
163 pri_and_ext_bus_width = BUS_MASK_32BIT; in mv_ddr_bus_bit_mask_get()
166 pri_and_ext_bus_width = MV_DDR_64BIT_BUS_MASK; in mv_ddr_bus_bit_mask_get()
169 pri_and_ext_bus_width = 0x0; in mv_ddr_bus_bit_mask_get()
173 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
176 return pri_and_ext_bus_width; in mv_ddr_bus_bit_mask_get()
|