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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/riscv/
H A Dsifive_plic.c205 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_read()
206 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_read()
208 uint32_t irq = (addr - plic->priority_base) >> 2; in sifive_plic_read()
217 uint32_t word = (addr - plic->priority_base) >> 2; in sifive_plic_read()
278 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_write()
279 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_write()
281 uint32_t irq = (addr - plic->priority_base) >> 2; in sifive_plic_write()
358 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
475 uint32_t priority_base, uint32_t pending_base, in type_init()
486 qdev_prop_set_uint32(dev, "priority-base", priority_base); in type_init()
/dports/emulators/qemu42/qemu-4.2.1/hw/riscv/
H A Dsifive_plic.c198 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_read()
199 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_read()
201 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_read()
273 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_write()
274 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_write()
276 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_write()
357 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
492 uint32_t priority_base, uint32_t pending_base, in type_init()
503 qdev_prop_set_uint32(dev, "priority-base", priority_base); in type_init()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/riscv/
H A Dsifive_plic.c198 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_read()
199 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_read()
201 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_read()
273 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_write()
274 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_write()
276 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_write()
357 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
492 uint32_t priority_base, uint32_t pending_base, in type_init()
503 qdev_prop_set_uint32(dev, "priority-base", priority_base); in type_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/riscv/
H A Dsifive_plic.c198 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_read()
199 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_read()
201 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_read()
273 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_write()
274 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_write()
276 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_write()
357 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
492 uint32_t priority_base, uint32_t pending_base, in type_init()
503 qdev_prop_set_uint32(dev, "priority-base", priority_base); in type_init()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/riscv/
H A Dsifive_plic.c198 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_read()
199 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_read()
201 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_read()
273 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_write()
274 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_write()
276 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_write()
357 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
492 uint32_t priority_base, uint32_t pending_base, in type_init()
503 qdev_prop_set_uint32(dev, "priority-base", priority_base); in type_init()
/dports/emulators/qemu60/qemu-6.0.0/hw/intc/
H A Dsifive_plic.c207 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_read()
208 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_read()
210 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_read()
282 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_write()
283 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_write()
285 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_write()
368 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
526 uint32_t num_priorities, uint32_t priority_base, in type_init()
538 qdev_prop_set_uint32(dev, "priority-base", priority_base); in type_init()
H A Dibex_plic.c132 } else if (addr_between(addr, s->priority_base, s->priority_num)) { in ibex_plic_read()
133 offset = (addr - s->priority_base) / 4; in ibex_plic_read()
171 } else if (addr_between(addr, s->priority_base, s->priority_num)) { in ibex_plic_write()
172 uint32_t irq = ((addr - s->priority_base) >> 2) + 1; in ibex_plic_write()
236 DEFINE_PROP_UINT32("priority-base", IbexPlicState, priority_base, 0x18),
/dports/emulators/qemu5/qemu-5.2.0/hw/intc/
H A Dsifive_plic.c207 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_read()
208 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_read()
210 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_read()
282 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_write()
283 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_write()
285 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_write()
368 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
526 uint32_t num_priorities, uint32_t priority_base, in type_init()
538 qdev_prop_set_uint32(dev, "priority-base", priority_base); in type_init()
H A Dibex_plic.c125 } else if (addr_between(addr, s->priority_base, s->priority_num)) { in ibex_plic_read()
126 offset = (addr - s->priority_base) / 4; in ibex_plic_read()
164 } else if (addr_between(addr, s->priority_base, s->priority_num)) { in ibex_plic_write()
165 uint32_t irq = ((addr - s->priority_base) >> 2) + 1; in ibex_plic_write()
229 DEFINE_PROP_UINT32("priority-base", IbexPlicState, priority_base, 0x18),
/dports/emulators/qemu/qemu-6.2.0/hw/intc/
H A Dsifive_plic.c202 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_read()
203 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_read()
205 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_read()
277 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_write()
278 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_write()
280 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_write()
490 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
529 uint32_t num_priorities, uint32_t priority_base, in type_init()
543 qdev_prop_set_uint32(dev, "priority-base", priority_base); in type_init()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/
H A Dsifive_plic.c202 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_read()
203 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_read()
205 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_read()
277 if (addr >= plic->priority_base && /* 4 bytes per source */ in sifive_plic_write()
278 addr < plic->priority_base + (plic->num_sources << 2)) in sifive_plic_write()
280 uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; in sifive_plic_write()
363 DEFINE_PROP_UINT32("priority-base", SiFivePLICState, priority_base, 0),
528 uint32_t num_priorities, uint32_t priority_base, in type_init()
542 qdev_prop_set_uint32(dev, "priority-base", priority_base); in type_init()
H A Dibex_plic.c124 } else if (addr_between(addr, s->priority_base, s->priority_num)) { in ibex_plic_read()
125 offset = (addr - s->priority_base) / 4; in ibex_plic_read()
163 } else if (addr_between(addr, s->priority_base, s->priority_num)) { in ibex_plic_write()
164 uint32_t irq = ((addr - s->priority_base) >> 2) + 1; in ibex_plic_write()
228 DEFINE_PROP_UINT32("priority-base", IbexPlicState, priority_base, 0x30),
/dports/emulators/qemu42/qemu-4.2.1/include/hw/riscv/
H A Dsifive_plic.h63 uint32_t priority_base; member
74 uint32_t priority_base, uint32_t pending_base,
/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/riscv/
H A Dsifive_plic.h63 uint32_t priority_base; member
74 uint32_t priority_base, uint32_t pending_base,
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/riscv/
H A Dsifive_plic.h63 uint32_t priority_base;
74 uint32_t priority_base, uint32_t pending_base,
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/riscv/
H A Dsifive_plic.h63 uint32_t priority_base; member
74 uint32_t priority_base, uint32_t pending_base,
/dports/emulators/qemu60/qemu-6.0.0/include/hw/intc/
H A Dsifive_plic.h68 uint32_t priority_base; member
79 uint32_t num_priorities, uint32_t priority_base,
H A Dibex_plic.h54 uint32_t priority_base; member
/dports/emulators/qemu5/qemu-5.2.0/include/hw/intc/
H A Dsifive_plic.h68 uint32_t priority_base; member
79 uint32_t num_priorities, uint32_t priority_base,
H A Dibex_plic.h54 uint32_t priority_base; member
/dports/emulators/qemu/qemu-6.2.0/include/hw/intc/
H A Dsifive_plic.h68 uint32_t priority_base; member
83 uint32_t num_priorities, uint32_t priority_base,
H A Dibex_plic.h54 uint32_t priority_base; member
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/riscv/
H A Dsifive_plic.h63 uint32_t priority_base; member
77 uint32_t priority_base, uint32_t pending_base,
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/intc/
H A Dsifive_plic.h68 uint32_t priority_base; member
83 uint32_t num_priorities, uint32_t priority_base,
H A Dibex_plic.h54 uint32_t priority_base; member

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