Home
last modified time | relevance | path

Searched refs:qpu_inst_count (Results 1 – 25 of 99) sorted by relevance

1234

/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/vc4/
H A Dvc4_qpu_emit.c38 for (int i = 0; i < c->qpu_inst_count; i++) { in vc4_dump_program()
632 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
634 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
636 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
638 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
644 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
646 QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
658 if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1], in vc4_generate_code()
663 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
674 c->qpu_insts[c->qpu_inst_count - 1] = in vc4_generate_code()
[all …]
H A Dvc4_qpu_schedule.c841 int thrsw_ip = c->qpu_inst_count; in emit_thrsw()
842 for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { in emit_thrsw()
843 uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; in emit_thrsw()
847 thrsw_ip = c->qpu_inst_count - i; in emit_thrsw()
850 if (thrsw_ip != c->qpu_inst_count) { in emit_thrsw()
860 while (c->qpu_inst_count < thrsw_ip + 3) { in emit_thrsw()
963 block->branch_qpu_ip = c->qpu_inst_count - 1; in schedule_instructions()
1109 block->start_qpu_ip = c->qpu_inst_count; in qpu_schedule_instructions()
1119 block->end_qpu_ip = c->qpu_inst_count - 1; in qpu_schedule_instructions()
1128 vc4_qpu_disasm(c->qpu_insts, c->qpu_inst_count); in qpu_schedule_instructions()
/dports/lang/clover/mesa-21.3.6/src/broadcom/compiler/
H A Dvir_to_qpu.c376 for (int i = 0; i < c->qpu_inst_count; i++) { in v3d_dump_qpu()
415 c->qpu_insts = rzalloc_array(c, uint64_t, c->qpu_inst_count); in v3d_vir_to_qpu()
431 assert(i == c->qpu_inst_count); in v3d_vir_to_qpu()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/broadcom/compiler/
H A Dvir_to_qpu.c376 for (int i = 0; i < c->qpu_inst_count; i++) { in v3d_dump_qpu()
415 c->qpu_insts = rzalloc_array(c, uint64_t, c->qpu_inst_count); in v3d_vir_to_qpu()
431 assert(i == c->qpu_inst_count); in v3d_vir_to_qpu()
/dports/graphics/mesa-libs/mesa-21.3.6/src/broadcom/compiler/
H A Dvir_to_qpu.c376 for (int i = 0; i < c->qpu_inst_count; i++) { in v3d_dump_qpu()
415 c->qpu_insts = rzalloc_array(c, uint64_t, c->qpu_inst_count); in v3d_vir_to_qpu()
431 assert(i == c->qpu_inst_count); in v3d_vir_to_qpu()

1234