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Searched refs:ram_block3a_12 (Results 1 – 2 of 2) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/megacells/
H A Dfifo_2k.v1970 cyclone_ram_block ram_block3a_12 instance
2007 ram_block3a_12.operation_mode = "dual_port",
2008 ram_block3a_12.port_a_address_width = 11,
2009 ram_block3a_12.port_a_data_width = 1,
2010 ram_block3a_12.port_a_first_address = 0,
2012 ram_block3a_12.port_a_last_address = 2047,
2017 ram_block3a_12.port_b_address_width = 11,
2020 ram_block3a_12.port_b_data_width = 1,
2021 ram_block3a_12.port_b_first_address = 0,
2023 ram_block3a_12.port_b_last_address = 2047,
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H A Dfifo_4k.v2062 cyclone_ram_block ram_block3a_12 instance
2099 ram_block3a_12.operation_mode = "dual_port",
2100 ram_block3a_12.port_a_address_width = 12,
2101 ram_block3a_12.port_a_data_width = 1,
2102 ram_block3a_12.port_a_first_address = 0,
2104 ram_block3a_12.port_a_last_address = 4095,
2109 ram_block3a_12.port_b_address_width = 12,
2112 ram_block3a_12.port_b_data_width = 1,
2113 ram_block3a_12.port_b_first_address = 0,
2115 ram_block3a_12.port_b_last_address = 4095,
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