| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/i2c/ |
| H A D | mxc_i2c.c | 181 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
185 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
202 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
206 (I2SR << reg_shift)); in wait_for_sr_state()
209 (I2SR << reg_shift)); in wait_for_sr_state()
235 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
266 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
308 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
310 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
490 readb(base + (I2DR << reg_shift)); in i2c_read_data()
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/i2c/ |
| H A D | mxc_i2c.c | 181 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
185 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
202 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
206 (I2SR << reg_shift)); in wait_for_sr_state()
209 (I2SR << reg_shift)); in wait_for_sr_state()
235 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
266 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
308 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
310 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
490 readb(base + (I2DR << reg_shift)); in i2c_read_data()
[all …]
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/i2c/ |
| H A D | mxc_i2c.c | 181 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
185 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
202 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
206 (I2SR << reg_shift)); in wait_for_sr_state()
209 (I2SR << reg_shift)); in wait_for_sr_state()
235 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
266 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
308 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
310 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
490 readb(base + (I2DR << reg_shift)); in i2c_read_data()
[all …]
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/i2c/ |
| H A D | mxc_i2c.c | 181 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
185 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
202 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
206 (I2SR << reg_shift)); in wait_for_sr_state()
209 (I2SR << reg_shift)); in wait_for_sr_state()
235 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
266 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
308 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
310 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
490 readb(base + (I2DR << reg_shift)); in i2c_read_data()
[all …]
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/i2c/ |
| H A D | mxc_i2c.c | 181 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
185 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
202 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
206 (I2SR << reg_shift)); in wait_for_sr_state()
209 (I2SR << reg_shift)); in wait_for_sr_state()
235 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
266 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
308 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
310 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
490 readb(base + (I2DR << reg_shift)); in i2c_read_data()
[all …]
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/i2c/ |
| H A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
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