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Searched refs:riscv_raise_exception (Results 1 – 25 of 35) sorted by relevance

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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/
H A Dop_helper.c27 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env, in riscv_raise_exception() function
37 riscv_raise_exception(env, exception, 0); in helper_raise_exception()
46 riscv_raise_exception(env, ret, GETPC()); in helper_csrr()
56 riscv_raise_exception(env, ret, GETPC()); in helper_csrw()
67 riscv_raise_exception(env, ret, GETPC()); in helper_csrrw()
80 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
85 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC()); in helper_sret()
89 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
138 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
150 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
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H A Dcpu_helper.c724 riscv_raise_exception(&cpu->env, cs->exception_index, retaddr); in riscv_cpu_do_transaction_failed()
749 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_do_unaligned_access()
887 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_tlb_fill()
/dports/emulators/qemu/qemu-6.2.0/target/riscv/
H A Dop_helper.c27 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env, in riscv_raise_exception() function
37 riscv_raise_exception(env, exception, 0); in helper_raise_exception()
46 riscv_raise_exception(env, ret, GETPC()); in helper_csrr()
56 riscv_raise_exception(env, ret, GETPC()); in helper_csrw()
67 riscv_raise_exception(env, ret, GETPC()); in helper_csrrw()
80 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
85 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC()); in helper_sret()
89 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
138 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
150 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
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H A Dcpu_helper.c790 riscv_raise_exception(&cpu->env, cs->exception_index, retaddr); in riscv_cpu_do_transaction_failed()
815 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_do_unaligned_access()
951 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_tlb_fill()
/dports/emulators/qemu60/qemu-6.0.0/target/riscv/
H A Dop_helper.c28 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env, in riscv_raise_exception() function
38 riscv_raise_exception(env, exception, 0); in helper_raise_exception()
48 riscv_raise_exception(env, -ret, GETPC()); in helper_csrrw()
60 riscv_raise_exception(env, -ret, GETPC()); in helper_csrrs()
72 riscv_raise_exception(env, -ret, GETPC()); in helper_csrrc()
85 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
90 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC()); in helper_sret()
94 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
143 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
155 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
[all …]
H A Dcpu_helper.c701 riscv_raise_exception(&cpu->env, cs->exception_index, retaddr); in riscv_cpu_do_transaction_failed()
726 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_do_unaligned_access()
863 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_tlb_fill()
/dports/emulators/qemu5/qemu-5.2.0/target/riscv/
H A Dop_helper.c28 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env, in riscv_raise_exception() function
38 riscv_raise_exception(env, exception, 0); in helper_raise_exception()
48 riscv_raise_exception(env, -ret, GETPC()); in helper_csrrw()
60 riscv_raise_exception(env, -ret, GETPC()); in helper_csrrs()
72 riscv_raise_exception(env, -ret, GETPC()); in helper_csrrc()
85 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
90 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC()); in helper_sret()
94 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
143 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
194 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_tlb_flush()
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H A Dcpu_helper.c645 riscv_raise_exception(&cpu->env, cs->exception_index, retaddr); in riscv_cpu_do_transaction_failed()
668 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_do_unaligned_access()
797 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_tlb_fill()
/dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/
H A Dop_helper.c28 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env, in riscv_raise_exception() function
39 riscv_raise_exception(env, exception, 0); in helper_raise_exception()
47 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrw()
57 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrs()
67 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrc()
77 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
82 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC()); in helper_sret()
87 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
107 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
136 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_wfi()
[all …]
H A Dcpu_helper.c415 riscv_raise_exception(&cpu->env, cs->exception_index, retaddr); in riscv_cpu_do_transaction_failed()
438 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_do_unaligned_access()
486 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_tlb_fill()
H A Dcpu.h279 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env,
H A Dfpu_helper.c77 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_set_rounding_mode()
/dports/emulators/qemu42/qemu-4.2.1/target/riscv/
H A Dop_helper.c28 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env, in riscv_raise_exception() function
39 riscv_raise_exception(env, exception, 0); in helper_raise_exception()
47 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrw()
57 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrs()
67 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrc()
77 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
82 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC()); in helper_sret()
87 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
107 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
136 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_wfi()
[all …]
H A Dcpu_helper.c415 riscv_raise_exception(&cpu->env, cs->exception_index, retaddr); in riscv_cpu_do_transaction_failed()
438 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_do_unaligned_access()
486 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_tlb_fill()
H A Dcpu.h279 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env,
H A Dfpu_helper.c77 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_set_rounding_mode()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/
H A Dop_helper.c28 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env, in riscv_raise_exception() function
39 riscv_raise_exception(env, exception, 0); in helper_raise_exception()
47 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrw()
57 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrs()
67 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrc()
79 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
84 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC()); in helper_sret()
89 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
139 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
183 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_wfi()
[all …]
H A Dcpu_helper.c673 riscv_raise_exception(&cpu->env, cs->exception_index, retaddr); in riscv_cpu_do_transaction_failed()
696 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_do_unaligned_access()
812 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_tlb_fill()
H A Dcpu.h335 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env,
H A Dfpu_helper.c77 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_set_rounding_mode()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/
H A Dop_helper.c65 void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env, in riscv_raise_exception() function
95 riscv_raise_exception(env, exception, 0); in helper_raise_exception()
103 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrw()
113 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrs()
123 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_csrrc()
135 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
141 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC()); in helper_sret()
146 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_sret()
202 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_mret()
261 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); in helper_wfi()
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H A Dcheri-archspecific.h50 riscv_raise_exception(env, EXCP_DEBUG, hostpc); in raise_cheri_exception_impl()
51 riscv_raise_exception(env, RISCV_EXCP_CHERI, hostpc); in raise_cheri_exception_impl()
72 riscv_raise_exception(env, RISCV_EXCP_LOAD_ADDR_MIS, retpc); in raise_unaligned_load_exception()
80 riscv_raise_exception(env, RISCV_EXCP_STORE_AMO_ADDR_MIS, retpc); in raise_unaligned_store_exception()
97 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, retpc); in validate_cjalr_target()
H A Dcpu_helper.c700 riscv_raise_exception(&cpu->env, cs->exception_index, retaddr); in riscv_cpu_do_transaction_failed()
723 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_do_unaligned_access()
884 riscv_raise_exception(env, cs->exception_index, retaddr); in riscv_cpu_tlb_fill()
921 riscv_raise_exception(env, env_cpu(env)->exception_index, retpc); in cpu_riscv_translate_address_tagmem()
H A Dop_helper_cheri.c141 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, in HELPER()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/cheri-common/
H A Dcheri-bounds-stats.h55 riscv_raise_exception(env, EXCP_DEBUG, retpc); in _became_unrepresentable()

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