| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 538 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
612 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 538 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
612 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 538 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
612 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 538 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
612 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3328.c | 545 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) in rk3328_saradc_set_clk() function
647 ret = rk3328_saradc_set_clk(priv->cru, rate); in rk3328_clk_set_rate()
|