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Searched refs:ro_mask (Results 1 – 25 of 41) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/hw/xen/
H A Dxen_pt_config_init.c629 .ro_mask = 0xFF,
656 .ro_mask = 0x00,
667 .ro_mask = 0x00,
678 .ro_mask = 0xFF,
689 .ro_mask = 0x00,
700 .ro_mask = 0xFF,
788 .ro_mask = 0xFF,
819 .ro_mask = 0xFF,
923 .ro_mask = 0xFF,
1022 .ro_mask = 0xFF,
[all …]
H A Dxen_pt.h114 uint32_t ro_mask; member
/dports/emulators/qemu/qemu-6.2.0/hw/xen/
H A Dxen_pt_config_init.c629 .ro_mask = 0xFF,
656 .ro_mask = 0x00,
667 .ro_mask = 0x00,
678 .ro_mask = 0xFF,
689 .ro_mask = 0x00,
700 .ro_mask = 0xFF,
788 .ro_mask = 0xFF,
819 .ro_mask = 0xFF,
923 .ro_mask = 0xFF,
1022 .ro_mask = 0xFF,
[all …]
H A Dxen_pt.h116 uint32_t ro_mask; member
/dports/emulators/qemu60/qemu-6.0.0/hw/xen/
H A Dxen_pt_config_init.c629 .ro_mask = 0xFF,
656 .ro_mask = 0x00,
667 .ro_mask = 0x00,
678 .ro_mask = 0xFF,
689 .ro_mask = 0x00,
700 .ro_mask = 0xFF,
788 .ro_mask = 0xFF,
819 .ro_mask = 0xFF,
923 .ro_mask = 0xFF,
1022 .ro_mask = 0xFF,
[all …]
H A Dxen_pt.h116 uint32_t ro_mask; member
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/xen/
H A Dxen_pt_config_init.c627 .ro_mask = 0xFF,
654 .ro_mask = 0x00,
665 .ro_mask = 0x00,
676 .ro_mask = 0xFF,
687 .ro_mask = 0x00,
698 .ro_mask = 0xFF,
786 .ro_mask = 0xFF,
817 .ro_mask = 0xFF,
921 .ro_mask = 0xFF,
1020 .ro_mask = 0xFF,
[all …]
H A Dxen_pt.h115 uint32_t ro_mask; member
/dports/emulators/qemu5/qemu-5.2.0/hw/xen/
H A Dxen_pt_config_init.c629 .ro_mask = 0xFF,
656 .ro_mask = 0x00,
667 .ro_mask = 0x00,
678 .ro_mask = 0xFF,
689 .ro_mask = 0x00,
700 .ro_mask = 0xFF,
788 .ro_mask = 0xFF,
819 .ro_mask = 0xFF,
923 .ro_mask = 0xFF,
1022 .ro_mask = 0xFF,
[all …]
H A Dxen_pt.h116 uint32_t ro_mask; member
/dports/emulators/qemu-utils/qemu-4.2.1/hw/xen/
H A Dxen_pt_config_init.c629 .ro_mask = 0xFF,
656 .ro_mask = 0x00,
667 .ro_mask = 0x00,
678 .ro_mask = 0xFF,
689 .ro_mask = 0x00,
700 .ro_mask = 0xFF,
788 .ro_mask = 0xFF,
819 .ro_mask = 0xFF,
923 .ro_mask = 0xFF,
1022 .ro_mask = 0xFF,
[all …]
H A Dxen_pt.h114 uint32_t ro_mask; member
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/xen/
H A Dxen_pt_config_init.c629 .ro_mask = 0xFF,
656 .ro_mask = 0x00,
667 .ro_mask = 0x00,
678 .ro_mask = 0xFF,
689 .ro_mask = 0x00,
700 .ro_mask = 0xFF,
788 .ro_mask = 0xFF,
819 .ro_mask = 0xFF,
923 .ro_mask = 0xFF,
1022 .ro_mask = 0xFF,
[all …]
H A Dxen_pt.h114 uint32_t ro_mask; member
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/xen/
H A Dxen_pt_config_init.c629 .ro_mask = 0xFF,
656 .ro_mask = 0x00,
667 .ro_mask = 0x00,
678 .ro_mask = 0xFF,
689 .ro_mask = 0x00,
700 .ro_mask = 0xFF,
788 .ro_mask = 0xFF,
819 .ro_mask = 0xFF,
923 .ro_mask = 0xFF,
1022 .ro_mask = 0xFF,
[all …]
H A Dxen_pt.h116 uint32_t ro_mask; member
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/xen/
H A Dxen_pt_config_init.c629 .ro_mask = 0xFF,
656 .ro_mask = 0x00,
667 .ro_mask = 0x00,
678 .ro_mask = 0xFF,
689 .ro_mask = 0x00,
700 .ro_mask = 0xFF,
788 .ro_mask = 0xFF,
819 .ro_mask = 0xFF,
923 .ro_mask = 0xFF,
1022 .ro_mask = 0xFF,
[all …]
H A Dxen_pt.h114 uint32_t ro_mask; member
/dports/emulators/dynamips-community/dynamips-0.2.17/common/
H A Ddev_mpc860.c1543 m_uint16_t data, ro_mask, rw_mask; in mpc860_fec_mii_write_access() local
1559 ro_mask = LX970A_CR_RO_MASK; in mpc860_fec_mii_write_access()
1564 ro_mask = LX970A_ANAR_RO_MASK; in mpc860_fec_mii_write_access()
1568 ro_mask = LX970A_MR_RO_MASK; in mpc860_fec_mii_write_access()
1572 ro_mask = LX970A_IER_RO_MASK; in mpc860_fec_mii_write_access()
1576 ro_mask = LX970A_CFGR_RO_MASK; in mpc860_fec_mii_write_access()
1581 ro_mask = 0xFFFF; in mpc860_fec_mii_write_access()
1586 d->fec_mii_regs[reg] = (d->fec_mii_regs[reg] & ro_mask) | (data & rw_mask); in mpc860_fec_mii_write_access()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/i915/gvt/
H A Dmmio.h64 u64 ro_mask; member
H A Dhandlers.c101 u32 addr_mask, u32 ro_mask, u32 device, in new_mmio_info() argument
135 info->ro_mask = ro_mask; in new_mmio_info()
3888 u64 ro_mask = mmio_info->ro_mask; in intel_vgpu_mmio_reg_rw() local
3896 if (likely(!ro_mask)) in intel_vgpu_mmio_reg_rw()
3898 else if (!~ro_mask) { in intel_vgpu_mmio_reg_rw()
3904 data &= ~ro_mask; in intel_vgpu_mmio_reg_rw()
3905 data |= vgpu_vreg(vgpu, offset) & ro_mask; in intel_vgpu_mmio_reg_rw()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/i915/gvt/
H A Dmmio.h64 u64 ro_mask; member
H A Dhandlers.c101 u32 addr_mask, u32 ro_mask, u32 device, in new_mmio_info() argument
135 info->ro_mask = ro_mask; in new_mmio_info()
3888 u64 ro_mask = mmio_info->ro_mask; in intel_vgpu_mmio_reg_rw() local
3896 if (likely(!ro_mask)) in intel_vgpu_mmio_reg_rw()
3898 else if (!~ro_mask) { in intel_vgpu_mmio_reg_rw()
3904 data &= ~ro_mask; in intel_vgpu_mmio_reg_rw()
3905 data |= vgpu_vreg(vgpu, offset) & ro_mask; in intel_vgpu_mmio_reg_rw()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/i915/gvt/
H A Dmmio.h64 u64 ro_mask; member
H A Dhandlers.c101 u32 addr_mask, u32 ro_mask, u32 device, in new_mmio_info() argument
135 info->ro_mask = ro_mask; in new_mmio_info()
3888 u64 ro_mask = mmio_info->ro_mask; in intel_vgpu_mmio_reg_rw() local
3896 if (likely(!ro_mask)) in intel_vgpu_mmio_reg_rw()
3898 else if (!~ro_mask) { in intel_vgpu_mmio_reg_rw()
3904 data &= ~ro_mask; in intel_vgpu_mmio_reg_rw()
3905 data |= vgpu_vreg(vgpu, offset) & ro_mask; in intel_vgpu_mmio_reg_rw()

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