| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
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| H A D | anv_pipeline.c | 167 anv_nir_ubo_addr_format(pdevice, device->robust_buffer_access), in anv_shader_compile_to_nir()
169 anv_nir_ssbo_addr_format(pdevice, device->robust_buffer_access), in anv_shader_compile_to_nir()
416 key->robust_buffer_access = robust_buffer_acccess; in populate_base_prog_key()
580 bool robust_buffer_access, in populate_bs_prog_key() argument
662 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_graphics()
688 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_compute()
710 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_ray_tracing_shader()
732 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_ray_tracing_combined_shader()
842 pipeline->device->robust_buffer_access)); in anv_pipeline_lower_nir()
845 pipeline->device->robust_buffer_access)); in anv_pipeline_lower_nir()
[all …]
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| /dports/lang/clover/mesa-21.3.6/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
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| H A D | anv_pipeline.c | 167 anv_nir_ubo_addr_format(pdevice, device->robust_buffer_access), in anv_shader_compile_to_nir()
169 anv_nir_ssbo_addr_format(pdevice, device->robust_buffer_access), in anv_shader_compile_to_nir()
416 key->robust_buffer_access = robust_buffer_acccess; in populate_base_prog_key()
580 bool robust_buffer_access, in populate_bs_prog_key() argument
662 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_graphics()
688 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_compute()
710 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_ray_tracing_shader()
732 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_ray_tracing_combined_shader()
842 pipeline->device->robust_buffer_access)); in anv_pipeline_lower_nir()
845 pipeline->device->robust_buffer_access)); in anv_pipeline_lower_nir()
[all …]
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| /dports/graphics/libosmesa/mesa-21.3.6/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
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| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
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| /dports/graphics/mesa-libs/mesa-21.3.6/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
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| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
|
| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
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| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
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| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
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| H A D | anv_pipeline.c | 122 anv_nir_ubo_addr_format(pdevice, device->robust_buffer_access), in anv_shader_compile_to_nir()
326 key->robust_buffer_access = robust_buffer_acccess; in populate_base_prog_key()
444 bool robust_buffer_access, in populate_task_prog_key() argument
455 bool robust_buffer_access, in populate_mesh_prog_key() argument
535 bool robust_buffer_access, in populate_bs_prog_key() argument
617 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_graphics()
643 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_compute()
665 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_ray_tracing_shader()
687 const bool rba = pipeline->base.device->robust_buffer_access; in anv_pipeline_hash_ray_tracing_combined_shader()
791 pipeline->device->robust_buffer_access)); in anv_pipeline_lower_nir()
[all …]
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| /dports/graphics/mesa-dri/mesa-21.3.6/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
59 bool robust_buffer_access) in anv_nir_ubo_addr_format() argument
62 if (robust_buffer_access) in anv_nir_ubo_addr_format()
74 bool robust_buffer_access,
80 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 33 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
91 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
211 if (robust_buffer_access) { in anv_nir_compute_push_layout()
243 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
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| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/vulkan/ |
| H A D | anv_nir.h | 45 bool robust_buffer_access) in anv_nir_ssbo_addr_format() argument
48 if (robust_buffer_access) in anv_nir_ssbo_addr_format()
58 bool robust_buffer_access,
64 bool robust_buffer_access,
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| H A D | anv_nir_compute_push_layout.c | 31 bool robust_buffer_access, in anv_nir_compute_push_layout() argument
80 if (push_ubo_ranges && robust_buffer_access) { in anv_nir_compute_push_layout()
173 if (robust_buffer_access) { in anv_nir_compute_push_layout()
205 if (binding->set < MAX_SETS && robust_buffer_access) { in anv_nir_compute_push_layout()
|