| /dports/devel/llvm70/llvm-7.0.1.src/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32
8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32
10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/llvm80/llvm-8.0.1.src/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | mismatched-intrinsics.ll | 8 ; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> …
9 ; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> […
15 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
16 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
22 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
23 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /dports/devel/capstone4/capstone-4.0.2/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /dports/devel/capstone3/capstone-3.0.5/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /dports/emulators/qemu42/qemu-4.2.1/capstone/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /dports/emulators/qemu/qemu-6.2.0/capstone/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /dports/emulators/qemu60/qemu-6.0.0/capstone/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /dports/devel/redasm/REDasm-2.1.1/LibREDasm/depends/capstone/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/capstone/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /dports/emulators/qemu5/qemu-5.2.0/capstone/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /dports/emulators/qemu-utils/qemu-4.2.1/capstone/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/capstone/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|