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Searched refs:sc_in (Results 1 – 25 of 85) sorted by relevance

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/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/examples/sysc/risc_cpu/
H A Ddecode.h40 sc_in<bool> resetin; // input reset
41 sc_in<unsigned> instruction; // fetched instruction
42 sc_in<unsigned> pred_instruction; // fetched instruction
43 sc_in<bool> instruction_valid; // input valid
44 sc_in<bool> pred_inst_valid; // input valid
47 sc_in<signed> alu_dataout; // data from ALU
48 sc_in<signed> dram_dataout; // data from Dcache
51 sc_in<signed> fpu_dout; // data from FPU
52 sc_in<bool> fpu_valid; // FPU data valid
56 sc_in<unsigned > pc; // program counter from IFU
[all …]
H A Dfetch.h40 sc_in<unsigned > ramdata; // instruction from RAM
41 sc_in<unsigned > branch_address; // branch target address
42 sc_in<bool> next_pc; // pc ++
43 sc_in<bool> branch_valid; // branch_valid
44 sc_in<bool> stall_fetch; // STALL_FETCH
45 sc_in<bool> interrupt; // interrrupt
46 sc_in<unsigned> int_vectno; // interrupt vector number
47 sc_in<bool> bios_valid; // BIOS input valid
48 sc_in<bool> icache_valid; // Icache input valid
49 sc_in<bool> pred_fetch; // branch prediction fetch
[all …]
H A Dexec.h40 sc_in<bool> reset; // reset not used.
41 sc_in<bool> in_valid; // input valid
42 sc_in<int> opcode; // opcode from ID
43 sc_in<bool> negate; // not implemented
44 sc_in<int> add1; // not implemented
45 sc_in<bool> shift_sel; // not implemented
46 sc_in<signed int> dina; // operand A
47 sc_in<signed int> dinb; // operand B
48 sc_in<bool> forward_A; // data forwarding A valid
49 sc_in<bool> forward_B; // data forwarding B valid
[all …]
H A Dpic.h40 sc_in<bool> ireq0; // interrupt request 0
41 sc_in<bool> ireq1; // interrupt request 1
42 sc_in<bool> ireq2; // interrupt request 2
43 sc_in<bool> ireq3; // interrupt request 3
44 sc_in<bool> cs; // chip select
45 sc_in<bool> rd_wr; // read or write
46 sc_in<bool> intack_cpu; // interrupt acknowledge from CPU
H A Dpaging.h40 sc_in<unsigned > paging_din; // input data
41 sc_in<bool> paging_csin; // chip select
42 sc_in<bool> paging_wein; // write enable
43 sc_in<unsigned > logical_address; // logical address
44 sc_in<unsigned > icache_din; // data from BIOS/icache
45 sc_in<bool> icache_validin; // data valid bit
46 sc_in<bool> icache_stall; // stall IFU if busy
H A Dicache.h43 sc_in<unsigned > datain; // modified instruction
44 sc_in<bool> cs; // chip select
45 sc_in<bool> we; // write enable for SMC
46 sc_in<unsigned > addr; // address
47 sc_in<bool> ld_valid; // load valid
48 sc_in<signed> ld_data; // load data value
H A Ddcache.h40 sc_in<signed> datain; // input data
41 sc_in<unsigned> statein; // input state bit MESI(=3210)
42 sc_in<bool> cs; // chip select
43 sc_in<bool> we; // write enable
44 sc_in<unsigned > addr; // address
45 sc_in<unsigned> dest; // write back to which register
H A Dfloating.h40 sc_in<bool> in_valid; // input valid bit
41 sc_in<int> opcode; // opcode
42 sc_in<signed int> floata; // operand A
43 sc_in<signed int> floatb; // operand B
44 sc_in<unsigned> dest; // write to which register
H A Dmmxu.h40 sc_in<bool> mmx_valid; // MMX unit enable
41 sc_in<int> opcode; // opcode
42 sc_in<signed int> mmxa; // operand A
43 sc_in<signed int> mmxb; // operand B
44 sc_in<unsigned> dest; // Destination register number
H A Dbios.h43 sc_in<unsigned > datain; // modified instruction
44 sc_in<bool> cs; // chip select
45 sc_in<bool> we; // write enable for SMC
46 sc_in<unsigned > addr; // physical address
/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/src/sysc/communication/
H A Dsc_signal_ports.h82 class sc_in
105 sc_in() in sc_in() function
145 sc_in( this_type& parent_ ) in sc_in() function
158 virtual ~sc_in() in ~sc_in()
275 sc_in( const this_type& );
301 sc_in<T>::end_of_elaboration() in end_of_elaboration()
394 class SC_API sc_in<bool> :
417 sc_in() in sc_in() function
477 virtual ~sc_in() in ~sc_in()
681 sc_in() in sc_in() function
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H A Dsc_signal_ports.cpp51 sc_in<bool>::end_of_elaboration() in end_of_elaboration()
66 sc_in<bool>::add_trace_internal(sc_trace_file* tf_, in add_trace_internal()
78 sc_in<bool>::add_trace(sc_trace_file* tf_, in add_trace()
86 sc_in<bool>::remove_traces() const in remove_traces()
101 sc_in<bool>::vbind( sc_interface& interface_ ) in vbind()
107 sc_in<bool>::vbind( sc_port_base& parent_ ) in vbind()
133 sc_in<sc_dt::sc_logic>::end_of_elaboration() in end_of_elaboration()
161 sc_in<sc_dt::sc_logic>::add_trace( sc_trace_file* tf_, in add_trace()
169 sc_in<sc_dt::sc_logic>::remove_traces() const in remove_traces()
184 sc_in<sc_dt::sc_logic>::vbind( sc_interface& interface_ ) in vbind()
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/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/examples/sysc/pkt_switch/
H A Dswitch.h46 sc_in<bool> switch_cntrl;
47 sc_in<pkt> in0;
48 sc_in<pkt> in1;
49 sc_in<pkt> in2;
50 sc_in<pkt> in3;
/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/examples/sysc/fft/fft_flpt/
H A Dfft.h40 sc_in<float> in_real;
41 sc_in<float> in_imag;
42 sc_in<bool> data_valid;
43 sc_in<bool> data_ack;
H A Dsink.h40 sc_in<bool> data_ready;
42 sc_in<float> in_real;
43 sc_in<float> in_imag;
/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/examples/sysc/fft/fft_fxpt/
H A Dfft.h40 sc_in<sc_int<16> > in_real;
41 sc_in<sc_int<16> > in_imag;
42 sc_in<bool> data_valid;
43 sc_in<bool> data_ack;
/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/examples/sysc/2.1/reset_signal_is/
H A Dreset_signal_is.cpp61 sc_in<bool> m_reset; in SC_MODULE()
62 sc_in<bool> m_valid; in SC_MODULE()
63 sc_in<int> m_value; in SC_MODULE()
84 sc_in<bool> m_ready; in SC_MODULE()
85 sc_in<bool> m_reset; in SC_MODULE()
/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/examples/sysc/fir/
H A Dfir_top.h44 sc_in<bool> CLK; in SC_MODULE()
45 sc_in<bool> RESET; in SC_MODULE()
46 sc_in<bool> IN_VALID; in SC_MODULE()
47 sc_in<int> SAMPLE; in SC_MODULE()
H A Dfir.h40 sc_in<bool> reset; in SC_MODULE()
41 sc_in<bool> input_valid; in SC_MODULE()
42 sc_in<int> sample; in SC_MODULE()
H A Dfir_fsm.h40 sc_in<bool> clock; in SC_MODULE()
41 sc_in<bool> reset; in SC_MODULE()
42 sc_in<bool> in_valid; in SC_MODULE()
H A Dfir_data.h40 sc_in<bool> reset; in SC_MODULE()
41 sc_in<unsigned> state_out; in SC_MODULE()
42 sc_in<int> sample; in SC_MODULE()
/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/src/sysc/kernel/
H A Dsc_sensitive.h50 template <class T> class sc_in; variable
70 typedef sc_in<bool> in_port_b_type;
71 typedef sc_in<sc_dt::sc_logic> in_port_l_type;
148 typedef sc_in<bool> in_port_b_type;
149 typedef sc_in<sc_dt::sc_logic> in_port_l_type;
214 typedef sc_in<bool> in_port_b_type;
215 typedef sc_in<sc_dt::sc_logic> in_port_l_type;
/dports/devel/systemc/systemc-2.3.4_pub_rev_20190614/examples/sysc/pipe/
H A Dstage3.h42 sc_in<double> prod; //input port 1
43 sc_in<double> quot; //input port 2
45 sc_in<bool> clk; //clock
H A Dstage1.h42 sc_in<double> in1; //input 1
43 sc_in<double> in2; //input 2
46 sc_in<bool> clk; //clock
H A Dstage2.h42 sc_in<double> sum; //input port 1
43 sc_in<double> diff; //input port 2
46 sc_in<bool> clk; //clock

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