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Searched refs:shared_dpll (Results 1 – 23 of 23) sorted by relevance

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.c74 shared_dpll[i] = pll->state; in intel_atomic_duplicate_dpll_state()
89 state->shared_dpll); in intel_atomic_get_shared_dpll_state()
92 return state->shared_dpll; in intel_atomic_get_shared_dpll_state()
308 &shared_dpll[i].hw_state, in intel_find_shared_dpll()
314 shared_dpll[i].pipe_mask, in intel_find_shared_dpll()
392 struct intel_shared_dpll_state *shared_dpll = state->shared_dpll; in intel_shared_dpll_swap_state() local
518 crtc_state->shared_dpll = pll; in ibx_get_dpll()
1058 crtc_state->shared_dpll = pll; in hsw_get_dpll()
1773 crtc_state->shared_dpll = pll; in skl_get_dpll()
2271 crtc_state->shared_dpll = pll; in bxt_get_dpll()
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H A Dintel_ddi.c212 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_pll_to_ddi_clk_sel()
1612 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in adls_ddi_enable_clock()
1656 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in rkl_ddi_enable_clock()
1700 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in dg1_ddi_enable_clock()
1753 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_combo_enable_clock()
1797 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in jsl_ddi_tc_enable_clock()
1840 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_tc_enable_clock()
1925 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in cnl_ddi_enable_clock()
1992 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in skl_ddi_enable_clock()
2060 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in hsw_ddi_enable_clock()
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H A Dintel_display.c2213 if (crtc_state->shared_dpll == in ilk_pch_enable()
3529 if (crtc_state->shared_dpll) in get_crtc_power_domains()
4727 pipe_config->shared_dpll = NULL; in i9xx_get_pipe_config()
5662 pipe_config->shared_dpll = NULL; in ilk_get_pipe_config()
5735 pipe_config->shared_dpll = in ilk_get_pipe_config()
5737 pll = pipe_config->shared_dpll; in ilk_get_pipe_config()
7547 saved_state->shared_dpll = crtc_state->shared_dpll; in copy_bigjoiner_crtc_state()
7597 saved_state->shared_dpll = crtc_state->shared_dpll; in intel_crtc_prepare_cleared_state()
8267 PIPE_CONF_CHECK_P(shared_dpll); in intel_pipe_config_compare()
8691 old_crtc_state->shared_dpll != new_crtc_state->shared_dpll) { in verify_shared_dpll_state()
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H A Dintel_display_types.h579 struct intel_shared_dpll_state shared_dpll[I915_NUM_PLLS]; member
1010 struct intel_shared_dpll *shared_dpll; member
H A Dintel_lvds.c238 pipe_config->shared_dpll); in intel_pre_enable_lvds()
H A Dintel_fdi.c598 drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
H A Dicl_dsi.c681 struct intel_shared_dpll *pll = crtc_state->shared_dpll; in gen11_dsi_map_pll()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.c74 shared_dpll[i] = pll->state; in intel_atomic_duplicate_dpll_state()
89 state->shared_dpll); in intel_atomic_get_shared_dpll_state()
92 return state->shared_dpll; in intel_atomic_get_shared_dpll_state()
308 &shared_dpll[i].hw_state, in intel_find_shared_dpll()
314 shared_dpll[i].pipe_mask, in intel_find_shared_dpll()
392 struct intel_shared_dpll_state *shared_dpll = state->shared_dpll; in intel_shared_dpll_swap_state() local
518 crtc_state->shared_dpll = pll; in ibx_get_dpll()
1058 crtc_state->shared_dpll = pll; in hsw_get_dpll()
1773 crtc_state->shared_dpll = pll; in skl_get_dpll()
2271 crtc_state->shared_dpll = pll; in bxt_get_dpll()
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H A Dintel_ddi.c212 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_pll_to_ddi_clk_sel()
1612 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in adls_ddi_enable_clock()
1656 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in rkl_ddi_enable_clock()
1700 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in dg1_ddi_enable_clock()
1753 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_combo_enable_clock()
1797 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in jsl_ddi_tc_enable_clock()
1840 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_tc_enable_clock()
1925 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in cnl_ddi_enable_clock()
1992 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in skl_ddi_enable_clock()
2060 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in hsw_ddi_enable_clock()
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H A Dintel_display.c2213 if (crtc_state->shared_dpll == in ilk_pch_enable()
3529 if (crtc_state->shared_dpll) in get_crtc_power_domains()
4727 pipe_config->shared_dpll = NULL; in i9xx_get_pipe_config()
5662 pipe_config->shared_dpll = NULL; in ilk_get_pipe_config()
5735 pipe_config->shared_dpll = in ilk_get_pipe_config()
5737 pll = pipe_config->shared_dpll; in ilk_get_pipe_config()
7547 saved_state->shared_dpll = crtc_state->shared_dpll; in copy_bigjoiner_crtc_state()
7597 saved_state->shared_dpll = crtc_state->shared_dpll; in intel_crtc_prepare_cleared_state()
8267 PIPE_CONF_CHECK_P(shared_dpll); in intel_pipe_config_compare()
8691 old_crtc_state->shared_dpll != new_crtc_state->shared_dpll) { in verify_shared_dpll_state()
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H A Dintel_display_types.h579 struct intel_shared_dpll_state shared_dpll[I915_NUM_PLLS]; member
1010 struct intel_shared_dpll *shared_dpll; member
H A Dintel_lvds.c238 pipe_config->shared_dpll); in intel_pre_enable_lvds()
H A Dintel_fdi.c598 drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
H A Dicl_dsi.c681 struct intel_shared_dpll *pll = crtc_state->shared_dpll; in gen11_dsi_map_pll()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.c74 shared_dpll[i] = pll->state; in intel_atomic_duplicate_dpll_state()
89 state->shared_dpll); in intel_atomic_get_shared_dpll_state()
92 return state->shared_dpll; in intel_atomic_get_shared_dpll_state()
308 &shared_dpll[i].hw_state, in intel_find_shared_dpll()
314 shared_dpll[i].pipe_mask, in intel_find_shared_dpll()
392 struct intel_shared_dpll_state *shared_dpll = state->shared_dpll; in intel_shared_dpll_swap_state() local
518 crtc_state->shared_dpll = pll; in ibx_get_dpll()
1058 crtc_state->shared_dpll = pll; in hsw_get_dpll()
1773 crtc_state->shared_dpll = pll; in skl_get_dpll()
2271 crtc_state->shared_dpll = pll; in bxt_get_dpll()
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H A Dintel_ddi.c212 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_pll_to_ddi_clk_sel()
1612 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in adls_ddi_enable_clock()
1656 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in rkl_ddi_enable_clock()
1700 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in dg1_ddi_enable_clock()
1753 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_combo_enable_clock()
1797 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in jsl_ddi_tc_enable_clock()
1840 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_tc_enable_clock()
1925 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in cnl_ddi_enable_clock()
1992 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in skl_ddi_enable_clock()
2060 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in hsw_ddi_enable_clock()
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H A Dintel_display.c2213 if (crtc_state->shared_dpll == in ilk_pch_enable()
3529 if (crtc_state->shared_dpll) in get_crtc_power_domains()
4727 pipe_config->shared_dpll = NULL; in i9xx_get_pipe_config()
5662 pipe_config->shared_dpll = NULL; in ilk_get_pipe_config()
5735 pipe_config->shared_dpll = in ilk_get_pipe_config()
5737 pll = pipe_config->shared_dpll; in ilk_get_pipe_config()
7547 saved_state->shared_dpll = crtc_state->shared_dpll; in copy_bigjoiner_crtc_state()
7597 saved_state->shared_dpll = crtc_state->shared_dpll; in intel_crtc_prepare_cleared_state()
8267 PIPE_CONF_CHECK_P(shared_dpll); in intel_pipe_config_compare()
8691 old_crtc_state->shared_dpll != new_crtc_state->shared_dpll) { in verify_shared_dpll_state()
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H A Dintel_display_types.h579 struct intel_shared_dpll_state shared_dpll[I915_NUM_PLLS]; member
1010 struct intel_shared_dpll *shared_dpll; member
H A Dintel_lvds.c238 pipe_config->shared_dpll); in intel_pre_enable_lvds()
H A Dintel_fdi.c598 drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
H A Dicl_dsi.c681 struct intel_shared_dpll *pll = crtc_state->shared_dpll; in gen11_dsi_map_pll()
/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/i915/
H A Dintel_display.c962 if (crtc->config.shared_dpll < 0) in intel_crtc_to_shared_dpll()
3458 crtc->config.shared_dpll = DPLL_ID_PRIVATE; in intel_put_shared_dpll()
3514 crtc->config.shared_dpll = i; in intel_get_shared_dpll()
4894 pipe_config->shared_dpll = crtc->config.shared_dpll; in intel_crtc_compute_config()
5842 pipe_config->shared_dpll = DPLL_ID_PRIVATE; in i9xx_get_pipe_config()
6850 pipe_config->shared_dpll = DPLL_ID_PRIVATE; in ironlake_get_pipe_config()
6885 pipe_config->shared_dpll = in ironlake_get_pipe_config()
6890 pipe_config->shared_dpll = DPLL_ID_PCH_PLL_B; in ironlake_get_pipe_config()
7206 pipe_config->shared_dpll = DPLL_ID_PRIVATE; in haswell_get_pipe_config()
9344 pipe_config->shared_dpll = DPLL_ID_PRIVATE; in intel_modeset_pipe_config()
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H A Dintel_drv.h335 enum intel_dpll_id shared_dpll; member