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Searched refs:sim_hw_parse (Results 1 – 25 of 31) sorted by relevance

12

/dports/devel/gdb761/gdb-7.6.1/sim/m68hc11/
H A Dinterp.c119 hw_dev = sim_hw_parse (sd, dev_list[i].device); in sim_get_info()
157 hw_cpu = sim_hw_parse (sd, cpu_type); in sim_board_reset()
182 device_tree = sim_hw_parse (sd, "/"); in sim_hw_configure()
196 sim_hw_parse (sd, "/m68hc11/reg 0x1000 0x03F"); in sim_hw_configure()
201 sim_hw_parse (sd, "/m68hc11/use_bank 1"); in sim_hw_configure()
231 sim_hw_parse (sd, "/m68hc11/nvram/reg 0x0 256"); in sim_hw_configure()
245 cpu->hw_cpu = sim_hw_parse (sd, "/m68hc11"); in sim_hw_configure()
261 sim_hw_parse (sd, "/m68hc12/use_bank 1"); in sim_hw_configure()
263 sim_hw_parse (sd, "/m68hc12/reg 0x0 0x3FF"); in sim_hw_configure()
289 sim_hw_parse (sd, "/m68hc12/nvram/reg 0x2000 8192"); in sim_hw_configure()
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/sim/m68hc11/
H A Dinterp.c120 hw_dev = sim_hw_parse (sd, dev_list[i].device); in sim_get_info()
158 hw_cpu = sim_hw_parse (sd, cpu_type); in sim_board_reset()
183 device_tree = sim_hw_parse (sd, "/"); in sim_hw_configure()
197 sim_hw_parse (sd, "/m68hc11/reg 0x1000 0x03F"); in sim_hw_configure()
202 sim_hw_parse (sd, "/m68hc11/use_bank 1"); in sim_hw_configure()
232 sim_hw_parse (sd, "/m68hc11/nvram/reg 0x0 256"); in sim_hw_configure()
246 cpu->hw_cpu = sim_hw_parse (sd, "/m68hc11"); in sim_hw_configure()
262 sim_hw_parse (sd, "/m68hc12/use_bank 1"); in sim_hw_configure()
264 sim_hw_parse (sd, "/m68hc12/reg 0x0 0x3FF"); in sim_hw_configure()
290 sim_hw_parse (sd, "/m68hc12/nvram/reg 0x2000 8192"); in sim_hw_configure()
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/m68hc11/
H A Dinterp.c121 hw_dev = sim_hw_parse (sd, dev_list[i].device); in sim_get_info()
159 hw_cpu = sim_hw_parse (sd, cpu_type); in sim_board_reset()
184 device_tree = sim_hw_parse (sd, "/"); in sim_hw_configure()
198 sim_hw_parse (sd, "/m68hc11/reg 0x1000 0x03F"); in sim_hw_configure()
203 sim_hw_parse (sd, "/m68hc11/use_bank 1"); in sim_hw_configure()
233 sim_hw_parse (sd, "/m68hc11/nvram/reg 0x0 256"); in sim_hw_configure()
247 cpu->hw_cpu = sim_hw_parse (sd, "/m68hc11"); in sim_hw_configure()
263 sim_hw_parse (sd, "/m68hc12/use_bank 1"); in sim_hw_configure()
265 sim_hw_parse (sd, "/m68hc12/reg 0x0 0x3FF"); in sim_hw_configure()
291 sim_hw_parse (sd, "/m68hc12/nvram/reg 0x2000 8192"); in sim_hw_configure()
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/m68hc11/
H A Dinterp.c121 hw_dev = sim_hw_parse (sd, dev_list[i].device); in sim_get_info()
159 hw_cpu = sim_hw_parse (sd, cpu_type); in sim_board_reset()
184 device_tree = sim_hw_parse (sd, "/"); in sim_hw_configure()
198 sim_hw_parse (sd, "/m68hc11/reg 0x1000 0x03F"); in sim_hw_configure()
203 sim_hw_parse (sd, "/m68hc11/use_bank 1"); in sim_hw_configure()
233 sim_hw_parse (sd, "/m68hc11/nvram/reg 0x0 256"); in sim_hw_configure()
247 cpu->hw_cpu = sim_hw_parse (sd, "/m68hc11"); in sim_hw_configure()
263 sim_hw_parse (sd, "/m68hc12/use_bank 1"); in sim_hw_configure()
265 sim_hw_parse (sd, "/m68hc12/reg 0x0 0x3FF"); in sim_hw_configure()
291 sim_hw_parse (sd, "/m68hc12/nvram/reg 0x2000 8192"); in sim_hw_configure()
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/sim/mn10300/
H A Dinterp.c151 sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4"); in sim_open()
155 sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8"); in sim_open()
173 sim_hw_parse (sd, "/mn103cpu@0x20000000"); in sim_open()
177 sim_hw_parse (sd, "/glue@0x20002000"); in sim_open()
182 sim_hw_parse (sd, "/glue@0x20004000"); in sim_open()
189 sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int"); in sim_open()
191 sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu"); in sim_open()
197 sim_hw_parse (sd, "/pal@0x31000000"); in sim_open()
199 sim_hw_parse (sd, "/pal@0x31000000/poll? true"); in sim_open()
202 sim_hw_parse (sd, "/glue@0x31002000"); in sim_open()
[all …]
/dports/devel/gdb761/gdb-7.6.1/sim/mn10300/
H A Dinterp.c151 sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4"); in sim_open()
155 sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8"); in sim_open()
173 sim_hw_parse (sd, "/mn103cpu@0x20000000"); in sim_open()
177 sim_hw_parse (sd, "/glue@0x20002000"); in sim_open()
182 sim_hw_parse (sd, "/glue@0x20004000"); in sim_open()
189 sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int"); in sim_open()
191 sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu"); in sim_open()
197 sim_hw_parse (sd, "/pal@0x31000000"); in sim_open()
199 sim_hw_parse (sd, "/pal@0x31000000/poll? true"); in sim_open()
202 sim_hw_parse (sd, "/glue@0x31002000"); in sim_open()
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/mn10300/
H A Dinterp.c151 sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4"); in sim_open()
155 sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8"); in sim_open()
173 sim_hw_parse (sd, "/mn103cpu@0x20000000"); in sim_open()
177 sim_hw_parse (sd, "/glue@0x20002000"); in sim_open()
182 sim_hw_parse (sd, "/glue@0x20004000"); in sim_open()
189 sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int"); in sim_open()
191 sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu"); in sim_open()
197 sim_hw_parse (sd, "/pal@0x31000000"); in sim_open()
199 sim_hw_parse (sd, "/pal@0x31000000/poll? true"); in sim_open()
202 sim_hw_parse (sd, "/glue@0x31002000"); in sim_open()
[all …]
H A DChangeLog498 (sim_open): Call sim_hw_parse instead of hw_tree_parse.
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/mn10300/
H A Dinterp.c151 sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4"); in sim_open()
155 sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8"); in sim_open()
173 sim_hw_parse (sd, "/mn103cpu@0x20000000"); in sim_open()
177 sim_hw_parse (sd, "/glue@0x20002000"); in sim_open()
182 sim_hw_parse (sd, "/glue@0x20004000"); in sim_open()
189 sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int"); in sim_open()
191 sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu"); in sim_open()
197 sim_hw_parse (sd, "/pal@0x31000000"); in sim_open()
199 sim_hw_parse (sd, "/pal@0x31000000/poll? true"); in sim_open()
202 sim_hw_parse (sd, "/glue@0x31002000"); in sim_open()
[all …]
H A DChangeLog498 (sim_open): Call sim_hw_parse instead of hw_tree_parse.
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/mips/
H A Dinterp.c471 sim_hw_parse (sd, "/tx3904cpu");
481 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend stdio");
483 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend tcp");
486 sim_hw_parse (sd, "/tx3904sio@0xfffff400/backend stdio");
489 sim_hw_parse (sd, "/tx3904irc > ip level /tx3904cpu");
500 sim_hw_parse (sd, "/pal@0xffff0000");
501 sim_hw_parse (sd, "/pal@0xffff0000/reg 0xffff0000 64");
505 sim_hw_parse (sd, "/pal@0x31000000 > timer tmr1 /tx3904irc");
506 sim_hw_parse (sd, "/pal@0x31000000 > int int0 /tx3904irc");
512 sim_hw_parse (sd, "/glue@0xffff0000/reg 0xffff0000 0x50");
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/mips/
H A Dinterp.c471 sim_hw_parse (sd, "/tx3904cpu");
481 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend stdio");
483 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend tcp");
486 sim_hw_parse (sd, "/tx3904sio@0xfffff400/backend stdio");
489 sim_hw_parse (sd, "/tx3904irc > ip level /tx3904cpu");
500 sim_hw_parse (sd, "/pal@0xffff0000");
501 sim_hw_parse (sd, "/pal@0xffff0000/reg 0xffff0000 64");
505 sim_hw_parse (sd, "/pal@0x31000000 > timer tmr1 /tx3904irc");
506 sim_hw_parse (sd, "/pal@0x31000000 > int int0 /tx3904irc");
512 sim_hw_parse (sd, "/glue@0xffff0000/reg 0xffff0000 0x50");
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/sim/mips/
H A Dinterp.c542 sim_hw_parse (sd, "/tx3904cpu");
552 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend stdio");
554 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend tcp");
557 sim_hw_parse (sd, "/tx3904sio@0xfffff400/backend stdio");
560 sim_hw_parse (sd, "/tx3904irc > ip level /tx3904cpu");
571 sim_hw_parse (sd, "/pal@0xffff0000");
572 sim_hw_parse (sd, "/pal@0xffff0000/reg 0xffff0000 64");
576 sim_hw_parse (sd, "/pal@0x31000000 > timer tmr1 /tx3904irc");
577 sim_hw_parse (sd, "/pal@0x31000000 > int int0 /tx3904irc");
583 sim_hw_parse (sd, "/glue@0xffff0000/reg 0xffff0000 0x50");
[all …]
/dports/devel/gdb761/gdb-7.6.1/sim/mips/
H A Dinterp.c543 sim_hw_parse (sd, "/tx3904cpu");
553 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend stdio");
555 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend tcp");
558 sim_hw_parse (sd, "/tx3904sio@0xfffff400/backend stdio");
561 sim_hw_parse (sd, "/tx3904irc > ip level /tx3904cpu");
572 sim_hw_parse (sd, "/pal@0xffff0000");
573 sim_hw_parse (sd, "/pal@0xffff0000/reg 0xffff0000 64");
577 sim_hw_parse (sd, "/pal@0x31000000 > timer tmr1 /tx3904irc");
578 sim_hw_parse (sd, "/pal@0x31000000 > int int0 /tx3904irc");
584 sim_hw_parse (sd, "/glue@0xffff0000/reg 0xffff0000 0x50");
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/sim/bfin/
H A Dmachs.c757 sim_hw_parse (sd, "/core/bfin_"#dv"/reg %#x %i", base, size); \
758 sim_hw_parse (sd, "/core/bfin_"#dv"/type %i", mdata->model_num); \
776 sim_hw_parse (sd, "/core/bfin_ctimer > ivtmr ivtmr /core/bfin_cec"); in bfin_model_hw_tree_init()
783 sim_hw_parse (sd, "/core/bfin_sic/type %i", mdata->model_num); in bfin_model_hw_tree_init()
788 sim_hw_parse (sd, "/core/bfin_pll > pll pll /core/bfin_sic"); in bfin_model_hw_tree_init()
800 sim_hw_parse (sd, "/core/bfin_dmac@%u/bfin_dma@%u/reg %#x %i", i, in bfin_model_hw_tree_init()
815 sim_hw_parse (sd, "/core/bfin_dmac@%u/bfin_dma@%u/reg %#x %i", in bfin_model_hw_tree_init()
855 sim_hw_parse (sd, "/core/%s > reset rst /core/bfin_cec", dev->dev); in bfin_model_hw_tree_init()
856 sim_hw_parse (sd, "/core/%s > nmi nmi /core/bfin_cec", dev->dev); in bfin_model_hw_tree_init()
862 sim_hw_parse (sd, "/core/%s > mask_a port%c_irq_a /core/bfin_sic", in bfin_model_hw_tree_init()
[all …]
/dports/devel/gdb761/gdb-7.6.1/sim/bfin/
H A Dmachs.c1437 sim_hw_parse (sd, "/core/%s > %s %s /core/%s", dev, in dv_bfin_hw_port_parse()
1446 sim_hw_parse (sd, "/core/bfin_"#dv"/reg %#x %i", base, size); \
1447 sim_hw_parse (sd, "/core/bfin_"#dv"/type %i", mdata->model_num); \
1466 sim_hw_parse (sd, "/core/bfin_ctimer > ivtmr ivtmr /core/bfin_cec"); in bfin_model_hw_tree_init()
1474 sim_hw_parse (sd, "/core/bfin_sic > ivg%i ivg%i /core/bfin_cec", i, i); in bfin_model_hw_tree_init()
1491 sim_hw_parse (sd, "/core/%s/reg %#x %i", dev, in bfin_model_hw_tree_init()
1504 sim_hw_parse (sd, "/core/%s/reg %#x %i", dev, in bfin_model_hw_tree_init()
1518 sim_hw_parse (sd, "/core/%s/type %i", dev->dev, mdata->model_num); in bfin_model_hw_tree_init()
1522 sim_hw_parse (sd, "/core/%s", dev->dev); in bfin_model_hw_tree_init()
1539 sim_hw_parse (sd, "/core/%s > reset rst /core/bfin_cec", dev->dev); in bfin_model_hw_tree_init()
[all …]
H A DChangeLog298 (bfin_model_hw_tree_init): Drop old sim_hw_parse call for bfin_sic.
332 (bfin_model_hw_tree_init): Replace calls to sim_hw_parse for
/dports/devel/avr-gdb/gdb-7.3.1/sim/common/
H A Dsim-hw.h33 struct hw *sim_hw_parse
H A Dsim-hw.c58 sim_hw_parse (struct sim_state *sd, in sim_hw_parse() function
/dports/devel/gdb761/gdb-7.6.1/sim/common/
H A Dsim-hw.h32 struct hw *sim_hw_parse
H A Dsim-hw.c57 sim_hw_parse (struct sim_state *sd, in sim_hw_parse() function
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/common/
H A Dsim-hw.h33 struct hw *sim_hw_parse
H A Dsim-hw.c58 sim_hw_parse (struct sim_state *sd, in sim_hw_parse() function
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/common/
H A Dsim-hw.h33 struct hw *sim_hw_parse
H A Dsim-hw.c58 sim_hw_parse (struct sim_state *sd, in sim_hw_parse() function

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