| /dports/sysutils/ipmitool/ipmitool-1.8.18/lib/ |
| H A D | dimm_spd.c | 1420 '0'+(spd_data[120]>>4), '0'+(spd_data[120]&15), '0'+(spd_data[121]>>4), '0'+(spd_data[121]&15) ); in ipmi_spd_print()
1423 spd_data[122], spd_data[123], spd_data[124], spd_data[125]); in ipmi_spd_print()
1520 year = ((spd_data[323] >> 4) * 10) + (spd_data[323] & 15); in ipmi_spd_print()
1521 week = ((spd_data[324]>>4) * 10) + (spd_data[324] & 15); in ipmi_spd_print()
1526 spd_data[325], spd_data[326], spd_data[327], spd_data[328]); in ipmi_spd_print()
1540 ii = (spd_data[3] & 0x0f) + (spd_data[4] & 0x0f) - 17; in ipmi_spd_print()
1541 k = ((spd_data[5] & 0x7) + 1) * spd_data[17]; in ipmi_spd_print()
1547 spd_data[4], spd_data[5], spd_data[17]); in ipmi_spd_print()
1598 if (spd_data[73]) { in ipmi_spd_print()
1606 spd_data[95], spd_data[96], spd_data[97], spd_data[98]); in ipmi_spd_print()
[all …]
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_spd.c | 16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
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