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Searched refs:spu_const (Results 1 – 25 of 72) sorted by relevance

123

/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md904 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1031 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1154 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1989 spu_const (<F2I>mode, 0x80000000ULL));
1991 spu_const (<F2I>mode, 0x3f800000ULL));
1996 spu_const (<F2I>mode, 1)));
2001 spu_const (<F2I>mode, -1)));
2245 operands[5] = spu_const(<MODE>mode, 31);
2260 operands[5] = spu_const(<MODE>mode, -1);
2276 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/lang/gcc9/gcc-9.4.0/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md904 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1031 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1154 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1989 spu_const (<F2I>mode, 0x80000000ULL));
1991 spu_const (<F2I>mode, 0x3f800000ULL));
1996 spu_const (<F2I>mode, 1)));
2001 spu_const (<F2I>mode, -1)));
2245 operands[5] = spu_const(<MODE>mode, 31);
2260 operands[5] = spu_const(<MODE>mode, -1);
2276 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (enum machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md896 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1022 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1145 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1980 spu_const (<F2I>mode, 0x80000000ULL));
1982 spu_const (<F2I>mode, 0x3f800000ULL));
1987 spu_const (<F2I>mode, 1)));
1992 spu_const (<F2I>mode, -1)));
2236 operands[5] = spu_const(<MODE>mode, 31);
2251 operands[5] = spu_const(<MODE>mode, -1);
2267 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/lang/gnat_util/gcc-6-20180516/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md896 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1022 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1145 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1980 spu_const (<F2I>mode, 0x80000000ULL));
1982 spu_const (<F2I>mode, 0x3f800000ULL));
1987 spu_const (<F2I>mode, 1)));
1992 spu_const (<F2I>mode, -1)));
2236 operands[5] = spu_const(<MODE>mode, 31);
2251 operands[5] = spu_const(<MODE>mode, -1);
2267 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md904 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1031 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1154 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1989 spu_const (<F2I>mode, 0x80000000ULL));
1991 spu_const (<F2I>mode, 0x3f800000ULL));
1996 spu_const (<F2I>mode, 1)));
2001 spu_const (<F2I>mode, -1)));
2245 operands[5] = spu_const(<MODE>mode, 31);
2260 operands[5] = spu_const(<MODE>mode, -1);
2276 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/lang/gcc48/gcc-4.8.5/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (enum machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md896 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1022 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1145 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1980 spu_const (<F2I>mode, 0x80000000ULL));
1982 spu_const (<F2I>mode, 0x3f800000ULL));
1987 spu_const (<F2I>mode, 1)));
1992 spu_const (<F2I>mode, -1)));
2236 operands[5] = spu_const(<MODE>mode, 31);
2251 operands[5] = spu_const(<MODE>mode, -1);
2267 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (enum machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md896 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1022 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1145 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1980 spu_const (<F2I>mode, 0x80000000ULL));
1982 spu_const (<F2I>mode, 0x3f800000ULL));
1987 spu_const (<F2I>mode, 1)));
1992 spu_const (<F2I>mode, -1)));
2236 operands[5] = spu_const(<MODE>mode, 31);
2251 operands[5] = spu_const(<MODE>mode, -1);
2267 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md904 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1031 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1154 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1989 spu_const (<F2I>mode, 0x80000000ULL));
1991 spu_const (<F2I>mode, 0x3f800000ULL));
1996 spu_const (<F2I>mode, 1)));
2001 spu_const (<F2I>mode, -1)));
2245 operands[5] = spu_const(<MODE>mode, 31);
2260 operands[5] = spu_const(<MODE>mode, -1);
2276 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md904 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1031 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1154 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1989 spu_const (<F2I>mode, 0x80000000ULL));
1991 spu_const (<F2I>mode, 0x3f800000ULL));
1996 spu_const (<F2I>mode, 1)));
2001 spu_const (<F2I>mode, -1)));
2245 operands[5] = spu_const(<MODE>mode, 31);
2260 operands[5] = spu_const(<MODE>mode, -1);
2276 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md904 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1031 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1154 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1989 spu_const (<F2I>mode, 0x80000000ULL));
1991 spu_const (<F2I>mode, 0x3f800000ULL));
1996 spu_const (<F2I>mode, 1)));
2001 spu_const (<F2I>mode, -1)));
2245 operands[5] = spu_const(<MODE>mode, 31);
2260 operands[5] = spu_const(<MODE>mode, -1);
2276 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
H A Dspu.md904 emit_move_insn (ops[6], spu_const (V4SImode, 1023+31));
1031 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1154 emit_move_insn (mask, spu_const (V8HImode, 0x00ff));
1989 spu_const (<F2I>mode, 0x80000000ULL));
1991 spu_const (<F2I>mode, 0x3f800000ULL));
1996 spu_const (<F2I>mode, 1)));
2001 spu_const (<F2I>mode, -1)));
2245 operands[5] = spu_const(<MODE>mode, 31);
2260 operands[5] = spu_const(<MODE>mode, -1);
2276 operands[5] = spu_const(<MODE>mode, 32);
[all …]
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
/dports/lang/gcc8/gcc-8.5.0/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);
/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/spu/
H A Dspu-protos.h41 extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val);

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