| /dports/lang/clover/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
357 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
423 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
434 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
435 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
436 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
357 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
423 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
434 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
435 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
436 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
357 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
423 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
434 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
435 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
436 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
357 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
423 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
434 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
435 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
436 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
357 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
423 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
434 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
435 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
436 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
357 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
423 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
434 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
435 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
436 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
357 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
423 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
434 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
435 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
436 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
357 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
423 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
434 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
435 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
436 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
358 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
424 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
435 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
436 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
437 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 70 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
87 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
98 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
146 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
254 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
357 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
423 radeon_emit(sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
434 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
435 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
436 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
[all …]
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| /dports/lang/clover/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
[all …]
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| /dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
[all …]
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| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
[all …]
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| /dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
[all …]
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| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
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| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
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| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
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| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
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| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
[all …]
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| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
[all …]
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| /dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_streamout.c | 87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
123 if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) { in r600_set_streamout_targets()
142 rctx->streamout.enabled_mask = enabled_mask; in r600_set_streamout_targets()
144 rctx->streamout.num_targets = num_targets; in r600_set_streamout_targets()
251 rctx->streamout.begin_emitted = true; in r600_emit_streamout_begin()
289 rctx->streamout.begin_emitted = false; in r600_emit_streamout_end()
327 rctx->streamout.streamout_enabled = enable; in r600_set_streamout_enable()
329 rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask | in r600_set_streamout_enable()
349 rctx->streamout.prims_gen_query_enabled = in r600_update_prims_generated_query_state()
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| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/radeonsi/ |
| H A D | si_state_streamout.c | 79 if (!sctx->streamout.enabled_mask) in si_streamout_buffers_dirty()
96 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) { in si_set_streamout_targets()
107 if (sctx->streamout.targets[i]) in si_set_streamout_targets()
154 if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) in si_set_streamout_targets()
250 sctx->streamout.begin_emitted = true; in gfx10_emit_streamout_begin()
348 sctx->streamout.begin_emitted = true; in si_emit_streamout_begin()
412 sctx->streamout.hw_enabled_mask & sctx->streamout.enabled_stream_buffers_mask); in si_emit_streamout_enable()
422 sctx->streamout.hw_enabled_mask = in si_set_streamout_enable()
423 sctx->streamout.enabled_mask | (sctx->streamout.enabled_mask << 4) | in si_set_streamout_enable()
424 (sctx->streamout.enabled_mask << 8) | (sctx->streamout.enabled_mask << 12); in si_set_streamout_enable()
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| /dports/multimedia/libva-utils/libva-utils-2.13.0/vendor/intel/ |
| H A D | avcstreamoutdemo.c | 1253 …if (IF_EQUAL_M(streamout->QW8[0].MvFwd_x, streamout->QW8[1].MvFwd_x, streamout->QW8[2].MvFwd_x, st… in dumpMvs()
1254 …&& IF_EQUAL_M(streamout->QW8[0].MvFwd_y, streamout->QW8[1].MvFwd_y, streamout->QW8[2].MvFwd_y, str… in dumpMvs()
1270 } else if ((IF_EQUAL(streamout->QW8[1].MvFwd_x, streamout->QW8[3].MvFwd_x) in dumpMvs()
1271 && IF_EQUAL(streamout->QW8[1].MvFwd_y, streamout->QW8[3].MvFwd_y)) in dumpMvs()
1272 && (IF_EQUAL(streamout->QW8[0].MvFwd_x, streamout->QW8[2].MvFwd_x) in dumpMvs()
1274 && !(IF_EQUAL(streamout->QW8[0].MvFwd_x, streamout->QW8[1].MvFwd_x) in dumpMvs()
1288 …3d,%3d->0 * %3d,%3d->0 *\n", streamout->QW8[0].MvFwd_x, streamout->QW8[0].MvFwd_y, streamout->QW… in dumpMvs()
1291 } else if ((IF_EQUAL(streamout->QW8[0].MvFwd_x, streamout->QW8[1].MvFwd_x) in dumpMvs()
1293 && (IF_EQUAL(streamout->QW8[2].MvFwd_x, streamout->QW8[3].MvFwd_x) in dumpMvs()
1318 …3d,%3d->0 * %3d,%3d->0 *\n", streamout->QW8[0].MvFwd_x, streamout->QW8[0].MvFwd_y, streamout->QW… in dumpMvs()
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| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/svga/ |
| H A D | svga_pipe_streamout.c | 170 if (!streamout) in svga_create_stream_output()
173 streamout->info = *info; in svga_create_stream_output()
174 streamout->id = id; in svga_create_stream_output()
176 streamout->streammask = 0; in svga_create_stream_output()
291 FREE(streamout); in svga_create_stream_output()
292 streamout = NULL; in svga_create_stream_output()
294 return streamout; in svga_create_stream_output()
302 unsigned id = streamout ? streamout->id : SVGA3D_INVALID_ID; in svga_set_stream_output()
309 streamout, id); in svga_set_stream_output()
348 assert(streamout != NULL); in svga_delete_stream_output()
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| /dports/lang/clover/mesa-21.3.6/src/gallium/drivers/svga/ |
| H A D | svga_pipe_streamout.c | 170 if (!streamout) in svga_create_stream_output()
173 streamout->info = *info; in svga_create_stream_output()
174 streamout->id = id; in svga_create_stream_output()
176 streamout->streammask = 0; in svga_create_stream_output()
291 FREE(streamout); in svga_create_stream_output()
292 streamout = NULL; in svga_create_stream_output()
294 return streamout; in svga_create_stream_output()
302 unsigned id = streamout ? streamout->id : SVGA3D_INVALID_ID; in svga_set_stream_output()
309 streamout, id); in svga_set_stream_output()
348 assert(streamout != NULL); in svga_delete_stream_output()
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