/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
H A D | v_swap_b32.mir | 136 # GCN: %0.sub0:vreg_64, %1.sub0:vreg_64 = V_SWAP_B32 %1.sub0, %0.sub0, implicit $exec 147 %2.sub0 = COPY %0.sub0 149 %0.sub0 = COPY %1.sub0 151 %1.sub0 = COPY %2.sub0 353 %2.sub0 = COPY %0.sub0 355 %0.sub0 = COPY %1.sub0 356 %1.sub0 = COPY %2.sub0 378 %2.sub0 = COPY %0.sub0 380 %0.sub0 = COPY %1.sub0 381 %1.sub0 = COPY %2.sub0 [all …]
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H A D | merge-load-store-vreg.mir | 94 # VI: V_ADD_I32_e64 %6, %0.sub0, 95 # VI-NEXT: DS_WRITE2_B32 killed %7, %0.sub0, %3.sub0, 0, 8, 96 # VI: V_ADD_I32_e64 %10, %3.sub0, 99 # GFX9: V_ADD_U32_e64 %6, %0.sub0, 100 # GFX9-NEXT: DS_WRITE2_B32_gfx9 killed %7, %0.sub0, %3.sub0, 0, 8, 101 # GFX9: V_ADD_U32_e64 %9, %3.sub0, 117 DS_WRITE_B32 %0.sub0, %0.sub0, 1024, 0, implicit $m0, implicit $exec :: (store 4 into %ir.tmp) 129 # VI: DS_WRITE2_B32 %0.sub0, %0.sub0, %3.sub0, 0, 8, 130 # VI: DS_READ2_B32 %3.sub0, 0, 8, 132 # GFX9: DS_WRITE2_B32_gfx9 %0.sub0, %0.sub0, %3.sub0, 0, 8, [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | v_swap_b32.mir | 136 # GCN: %0.sub0:vreg_64, %1.sub0:vreg_64 = V_SWAP_B32 %1.sub0, %0.sub0, implicit $exec 147 %2.sub0 = COPY %0.sub0 149 %0.sub0 = COPY %1.sub0 151 %1.sub0 = COPY %2.sub0 353 %2.sub0 = COPY %0.sub0 355 %0.sub0 = COPY %1.sub0 356 %1.sub0 = COPY %2.sub0 378 %2.sub0 = COPY %0.sub0 380 %0.sub0 = COPY %1.sub0 381 %1.sub0 = COPY %2.sub0 [all …]
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H A D | merge-load-store-vreg.mir | 94 # VI: V_ADD_I32_e64 %6, %0.sub0, 95 # VI-NEXT: DS_WRITE2_B32 killed %7, %0.sub0, %3.sub0, 0, 8, 96 # VI: V_ADD_I32_e64 %10, %3.sub0, 99 # GFX9: V_ADD_U32_e64 %6, %0.sub0, 100 # GFX9-NEXT: DS_WRITE2_B32_gfx9 killed %7, %0.sub0, %3.sub0, 0, 8, 101 # GFX9: V_ADD_U32_e64 %9, %3.sub0, 117 DS_WRITE_B32 %0.sub0, %0.sub0, 1024, 0, implicit $m0, implicit $exec :: (store 4 into %ir.tmp) 129 # VI: DS_WRITE2_B32 %0.sub0, %0.sub0, %3.sub0, 0, 8, 130 # VI: DS_READ2_B32 %3.sub0, 0, 8, 132 # GFX9: DS_WRITE2_B32_gfx9 %0.sub0, %0.sub0, %3.sub0, 0, 8, [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
H A D | v_swap_b32.mir | 136 # GCN: %0.sub0:vreg_64, %1.sub0:vreg_64 = V_SWAP_B32 %1.sub0, %0.sub0, implicit $exec 147 %2.sub0 = COPY %0.sub0 149 %0.sub0 = COPY %1.sub0 151 %1.sub0 = COPY %2.sub0 353 %2.sub0 = COPY %0.sub0 355 %0.sub0 = COPY %1.sub0 356 %1.sub0 = COPY %2.sub0 378 %2.sub0 = COPY %0.sub0 380 %0.sub0 = COPY %1.sub0 381 %1.sub0 = COPY %2.sub0 [all …]
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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/ |
H A D | v_swap_b32.mir | 136 # GCN: %0.sub0:vreg_64, %1.sub0:vreg_64 = V_SWAP_B32 %1.sub0, %0.sub0, implicit $exec 147 %2.sub0 = COPY %0.sub0 149 %0.sub0 = COPY %1.sub0 151 %1.sub0 = COPY %2.sub0 353 %2.sub0 = COPY %0.sub0 355 %0.sub0 = COPY %1.sub0 356 %1.sub0 = COPY %2.sub0 378 %2.sub0 = COPY %0.sub0 380 %0.sub0 = COPY %1.sub0 381 %1.sub0 = COPY %2.sub0 [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | splitkit-copy-bundle.mir | 171 %2.sub0:sgpr_1024 = S_MOV_B32 -1 175 %2.sub2:sgpr_1024 = COPY %2.sub0 177 %2.sub4:sgpr_1024 = COPY %2.sub0 179 %2.sub6:sgpr_1024 = COPY %2.sub0 181 %2.sub8:sgpr_1024 = COPY %2.sub0 203 %3.sub1:sgpr_1024 = COPY %3.sub0 204 %3.sub2:sgpr_1024 = COPY %3.sub0 205 %3.sub3:sgpr_1024 = COPY %3.sub0 206 %3.sub4:sgpr_1024 = COPY %3.sub0 207 %3.sub5:sgpr_1024 = COPY %3.sub0 [all …]
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H A D | splitkit-copy-live-lanes.mir | 20 ; CHECK: %2.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub0 177 ; CHECK: undef %157.sub0:vreg_128 = COPY %159.sub0 { 183 ; CHECK: undef %153.sub0:vreg_128 = COPY %155.sub0 { 203 ; CHECK: undef %139.sub0:vreg_128 = COPY %141.sub0 { 223 ; CHECK: undef %125.sub0:vreg_128 = COPY %127.sub0 { 229 ; CHECK: undef %121.sub0:vreg_128 = COPY %123.sub0 { 242 ; CHECK: undef %112.sub0:vreg_128 = COPY %114.sub0 { 248 ; CHECK: undef %108.sub0:vreg_128 = COPY %110.sub0 { 281 ; CHECK: undef %85.sub0:vreg_128 = COPY %87.sub0 { 308 ; CHECK: undef %66.sub0:vreg_128 = COPY %68.sub0 { [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | splitkit-copy-bundle.mir | 166 %2.sub0:sgpr_1024 = S_MOV_B32 -1 170 %2.sub2:sgpr_1024 = COPY %2.sub0 172 %2.sub4:sgpr_1024 = COPY %2.sub0 174 %2.sub6:sgpr_1024 = COPY %2.sub0 176 %2.sub8:sgpr_1024 = COPY %2.sub0 198 %3.sub1:sgpr_1024 = COPY %3.sub0 199 %3.sub2:sgpr_1024 = COPY %3.sub0 200 %3.sub3:sgpr_1024 = COPY %3.sub0 201 %3.sub4:sgpr_1024 = COPY %3.sub0 202 %3.sub5:sgpr_1024 = COPY %3.sub0 [all …]
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H A D | splitkit-copy-live-lanes.mir | 20 ; CHECK: %2.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub0 177 ; CHECK: undef %157.sub0:vreg_128 = COPY %156.sub0 { 190 ; CHECK: undef %145.sub0:vreg_128 = COPY %147.sub0 { 196 ; CHECK: undef %141.sub0:vreg_128 = COPY %143.sub0 { 202 ; CHECK: undef %137.sub0:vreg_128 = COPY %139.sub0 { 215 ; CHECK: undef %122.sub0:vreg_128 = COPY %124.sub0 { 221 ; CHECK: undef %118.sub0:vreg_128 = COPY %120.sub0 { 227 ; CHECK: undef %114.sub0:vreg_128 = COPY %116.sub0 { 233 ; CHECK: undef %110.sub0:vreg_128 = COPY %112.sub0 { 246 ; CHECK: undef %101.sub0:vreg_128 = COPY %103.sub0 { [all …]
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H A D | pr51516.mir | 64 %27.sub0:vreg_128 = COPY %4.sub0 67 %26.sub0:vreg_128 = COPY %4.sub2 70 %25.sub0:vreg_128 = COPY %5.sub0 73 %24.sub0:vreg_128 = COPY %5.sub2 76 %23.sub0:vreg_128 = COPY %6.sub0 79 %22.sub0:vreg_128 = COPY %6.sub2 82 %21.sub0:vreg_128 = COPY %7.sub0 88 %19.sub0:vreg_128 = COPY %8.sub0 94 %17.sub0:vreg_128 = COPY %9.sub0 100 %15.sub0:vreg_128 = COPY %10.sub0 [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | splitkit-copy-bundle.mir | 171 %2.sub0:sgpr_1024 = S_MOV_B32 -1 175 %2.sub2:sgpr_1024 = COPY %2.sub0 177 %2.sub4:sgpr_1024 = COPY %2.sub0 179 %2.sub6:sgpr_1024 = COPY %2.sub0 181 %2.sub8:sgpr_1024 = COPY %2.sub0 203 %3.sub1:sgpr_1024 = COPY %3.sub0 204 %3.sub2:sgpr_1024 = COPY %3.sub0 205 %3.sub3:sgpr_1024 = COPY %3.sub0 206 %3.sub4:sgpr_1024 = COPY %3.sub0 207 %3.sub5:sgpr_1024 = COPY %3.sub0 [all …]
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H A D | splitkit-copy-live-lanes.mir | 20 ; CHECK: %2.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub0 177 ; CHECK: undef %157.sub0:vreg_128 = COPY %159.sub0 { 183 ; CHECK: undef %153.sub0:vreg_128 = COPY %155.sub0 { 203 ; CHECK: undef %139.sub0:vreg_128 = COPY %141.sub0 { 223 ; CHECK: undef %125.sub0:vreg_128 = COPY %127.sub0 { 229 ; CHECK: undef %121.sub0:vreg_128 = COPY %123.sub0 { 242 ; CHECK: undef %112.sub0:vreg_128 = COPY %114.sub0 { 248 ; CHECK: undef %108.sub0:vreg_128 = COPY %110.sub0 { 281 ; CHECK: undef %85.sub0:vreg_128 = COPY %87.sub0 { 308 ; CHECK: undef %66.sub0:vreg_128 = COPY %68.sub0 { [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | splitkit-copy-bundle.mir | 171 %2.sub0:sgpr_1024 = S_MOV_B32 -1 175 %2.sub2:sgpr_1024 = COPY %2.sub0 177 %2.sub4:sgpr_1024 = COPY %2.sub0 179 %2.sub6:sgpr_1024 = COPY %2.sub0 181 %2.sub8:sgpr_1024 = COPY %2.sub0 203 %3.sub1:sgpr_1024 = COPY %3.sub0 204 %3.sub2:sgpr_1024 = COPY %3.sub0 205 %3.sub3:sgpr_1024 = COPY %3.sub0 206 %3.sub4:sgpr_1024 = COPY %3.sub0 207 %3.sub5:sgpr_1024 = COPY %3.sub0 [all …]
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H A D | splitkit-copy-live-lanes.mir | 20 ; CHECK: %2.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub0 177 ; CHECK: undef %157.sub0:vreg_128 = COPY %159.sub0 { 183 ; CHECK: undef %153.sub0:vreg_128 = COPY %155.sub0 { 203 ; CHECK: undef %139.sub0:vreg_128 = COPY %141.sub0 { 223 ; CHECK: undef %125.sub0:vreg_128 = COPY %127.sub0 { 229 ; CHECK: undef %121.sub0:vreg_128 = COPY %123.sub0 { 242 ; CHECK: undef %112.sub0:vreg_128 = COPY %114.sub0 { 248 ; CHECK: undef %108.sub0:vreg_128 = COPY %110.sub0 { 281 ; CHECK: undef %85.sub0:vreg_128 = COPY %87.sub0 { 308 ; CHECK: undef %66.sub0:vreg_128 = COPY %68.sub0 { [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | splitkit-copy-bundle.mir | 171 %2.sub0:sgpr_1024 = S_MOV_B32 -1 175 %2.sub2:sgpr_1024 = COPY %2.sub0 177 %2.sub4:sgpr_1024 = COPY %2.sub0 179 %2.sub6:sgpr_1024 = COPY %2.sub0 181 %2.sub8:sgpr_1024 = COPY %2.sub0 203 %3.sub1:sgpr_1024 = COPY %3.sub0 204 %3.sub2:sgpr_1024 = COPY %3.sub0 205 %3.sub3:sgpr_1024 = COPY %3.sub0 206 %3.sub4:sgpr_1024 = COPY %3.sub0 207 %3.sub5:sgpr_1024 = COPY %3.sub0 [all …]
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H A D | splitkit-copy-live-lanes.mir | 20 ; CHECK: %2.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub0 177 ; CHECK: undef %157.sub0:vreg_128 = COPY %159.sub0 { 183 ; CHECK: undef %153.sub0:vreg_128 = COPY %155.sub0 { 203 ; CHECK: undef %139.sub0:vreg_128 = COPY %141.sub0 { 223 ; CHECK: undef %125.sub0:vreg_128 = COPY %127.sub0 { 229 ; CHECK: undef %121.sub0:vreg_128 = COPY %123.sub0 { 242 ; CHECK: undef %112.sub0:vreg_128 = COPY %114.sub0 { 248 ; CHECK: undef %108.sub0:vreg_128 = COPY %110.sub0 { 281 ; CHECK: undef %85.sub0:vreg_128 = COPY %87.sub0 { 308 ; CHECK: undef %66.sub0:vreg_128 = COPY %68.sub0 { [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | splitkit-copy-bundle.mir | 171 %2.sub0:sgpr_1024 = S_MOV_B32 -1 175 %2.sub2:sgpr_1024 = COPY %2.sub0 177 %2.sub4:sgpr_1024 = COPY %2.sub0 179 %2.sub6:sgpr_1024 = COPY %2.sub0 181 %2.sub8:sgpr_1024 = COPY %2.sub0 203 %3.sub1:sgpr_1024 = COPY %3.sub0 204 %3.sub2:sgpr_1024 = COPY %3.sub0 205 %3.sub3:sgpr_1024 = COPY %3.sub0 206 %3.sub4:sgpr_1024 = COPY %3.sub0 207 %3.sub5:sgpr_1024 = COPY %3.sub0 [all …]
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H A D | splitkit-copy-live-lanes.mir | 20 ; CHECK: %2.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub0 177 ; CHECK: undef %157.sub0:vreg_128 = COPY %159.sub0 { 183 ; CHECK: undef %153.sub0:vreg_128 = COPY %155.sub0 { 203 ; CHECK: undef %139.sub0:vreg_128 = COPY %141.sub0 { 223 ; CHECK: undef %125.sub0:vreg_128 = COPY %127.sub0 { 229 ; CHECK: undef %121.sub0:vreg_128 = COPY %123.sub0 { 242 ; CHECK: undef %112.sub0:vreg_128 = COPY %114.sub0 { 248 ; CHECK: undef %108.sub0:vreg_128 = COPY %110.sub0 { 281 ; CHECK: undef %85.sub0:vreg_128 = COPY %87.sub0 { 308 ; CHECK: undef %66.sub0:vreg_128 = COPY %68.sub0 { [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | splitkit-copy-bundle.mir | 171 %2.sub0:sgpr_1024 = S_MOV_B32 -1 175 %2.sub2:sgpr_1024 = COPY %2.sub0 177 %2.sub4:sgpr_1024 = COPY %2.sub0 179 %2.sub6:sgpr_1024 = COPY %2.sub0 181 %2.sub8:sgpr_1024 = COPY %2.sub0 203 %3.sub1:sgpr_1024 = COPY %3.sub0 204 %3.sub2:sgpr_1024 = COPY %3.sub0 205 %3.sub3:sgpr_1024 = COPY %3.sub0 206 %3.sub4:sgpr_1024 = COPY %3.sub0 207 %3.sub5:sgpr_1024 = COPY %3.sub0 [all …]
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H A D | splitkit-copy-live-lanes.mir | 20 ; CHECK: %2.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub0 177 ; CHECK: undef %157.sub0:vreg_128 = COPY %159.sub0 { 183 ; CHECK: undef %153.sub0:vreg_128 = COPY %155.sub0 { 203 ; CHECK: undef %139.sub0:vreg_128 = COPY %141.sub0 { 223 ; CHECK: undef %125.sub0:vreg_128 = COPY %127.sub0 { 229 ; CHECK: undef %121.sub0:vreg_128 = COPY %123.sub0 { 242 ; CHECK: undef %112.sub0:vreg_128 = COPY %114.sub0 { 248 ; CHECK: undef %108.sub0:vreg_128 = COPY %110.sub0 { 281 ; CHECK: undef %85.sub0:vreg_128 = COPY %87.sub0 { 308 ; CHECK: undef %66.sub0:vreg_128 = COPY %68.sub0 { [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | splitkit-copy-bundle.mir | 171 %2.sub0:sgpr_1024 = S_MOV_B32 -1 175 %2.sub2:sgpr_1024 = COPY %2.sub0 177 %2.sub4:sgpr_1024 = COPY %2.sub0 179 %2.sub6:sgpr_1024 = COPY %2.sub0 181 %2.sub8:sgpr_1024 = COPY %2.sub0 203 %3.sub1:sgpr_1024 = COPY %3.sub0 204 %3.sub2:sgpr_1024 = COPY %3.sub0 205 %3.sub3:sgpr_1024 = COPY %3.sub0 206 %3.sub4:sgpr_1024 = COPY %3.sub0 207 %3.sub5:sgpr_1024 = COPY %3.sub0 [all …]
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H A D | splitkit-copy-live-lanes.mir | 20 ; CHECK: %2.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub0 177 ; CHECK: undef %157.sub0:vreg_128 = COPY %159.sub0 { 183 ; CHECK: undef %153.sub0:vreg_128 = COPY %155.sub0 { 203 ; CHECK: undef %139.sub0:vreg_128 = COPY %141.sub0 { 223 ; CHECK: undef %125.sub0:vreg_128 = COPY %127.sub0 { 229 ; CHECK: undef %121.sub0:vreg_128 = COPY %123.sub0 { 242 ; CHECK: undef %112.sub0:vreg_128 = COPY %114.sub0 { 248 ; CHECK: undef %108.sub0:vreg_128 = COPY %110.sub0 { 281 ; CHECK: undef %85.sub0:vreg_128 = COPY %87.sub0 { 308 ; CHECK: undef %66.sub0:vreg_128 = COPY %68.sub0 { [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | splitkit-copy-bundle.mir | 171 %2.sub0:sgpr_1024 = S_MOV_B32 -1 175 %2.sub2:sgpr_1024 = COPY %2.sub0 177 %2.sub4:sgpr_1024 = COPY %2.sub0 179 %2.sub6:sgpr_1024 = COPY %2.sub0 181 %2.sub8:sgpr_1024 = COPY %2.sub0 203 %3.sub1:sgpr_1024 = COPY %3.sub0 204 %3.sub2:sgpr_1024 = COPY %3.sub0 205 %3.sub3:sgpr_1024 = COPY %3.sub0 206 %3.sub4:sgpr_1024 = COPY %3.sub0 207 %3.sub5:sgpr_1024 = COPY %3.sub0 [all …]
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H A D | splitkit-copy-live-lanes.mir | 20 ; CHECK: %2.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub0 177 ; CHECK: undef %157.sub0:vreg_128 = COPY %159.sub0 { 183 ; CHECK: undef %153.sub0:vreg_128 = COPY %155.sub0 { 203 ; CHECK: undef %139.sub0:vreg_128 = COPY %141.sub0 { 223 ; CHECK: undef %125.sub0:vreg_128 = COPY %127.sub0 { 229 ; CHECK: undef %121.sub0:vreg_128 = COPY %123.sub0 { 242 ; CHECK: undef %112.sub0:vreg_128 = COPY %114.sub0 { 248 ; CHECK: undef %108.sub0:vreg_128 = COPY %110.sub0 { 281 ; CHECK: undef %85.sub0:vreg_128 = COPY %87.sub0 { 308 ; CHECK: undef %66.sub0:vreg_128 = COPY %68.sub0 { [all …]
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