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Searched refs:sub_wire2 (Results 1 – 8 of 8) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/megacells/
H A Dfifo_1kx16.v61 wire sub_wire2; net
66 wire almost_empty = sub_wire2;
78 .almost_empty (sub_wire2),
H A Dfifo_4kx16_dc.v63 wire sub_wire2; net
68 wire wrfull = sub_wire2;
81 .wrfull (sub_wire2),
H A Dfifo_4k_18.v66 wire sub_wire2; net
71 wire wrfull = sub_wire2;
84 .wrfull (sub_wire2),
H A Dclk_doubler.v53 wire sub_wire2 = inclk0; net
54 wire [1:0] sub_wire3 = {sub_wire4, sub_wire2};
H A Dpll.v53 wire sub_wire2 = inclk0; net
54 wire [1:0] sub_wire3 = {sub_wire4, sub_wire2};
H A Ddspclkpll.v53 wire [1:1] sub_wire2 = sub_wire0[1:1]; net
56 wire c1 = sub_wire2;
H A Dfifo_2k.v3246 wire sub_wire2; net
3251 wire wrfull = sub_wire2;
3264 .wrfull (sub_wire2),
H A Dfifo_4k.v3398 wire sub_wire2; net
3403 wire wrfull = sub_wire2;
3416 .wrfull (sub_wire2),