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Searched refs:sub_wire3 (Results 1 – 8 of 8) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/megacells/
H A Dfifo_1kx16.v62 wire [15:0] sub_wire3; net
67 wire [15:0] q = sub_wire3[15:0];
79 .q (sub_wire3),
H A Dfifo_4kx16_dc.v64 wire [15:0] sub_wire3; net
69 wire [15:0] q = sub_wire3[15:0];
82 .q (sub_wire3),
H A Dfifo_4k_18.v67 wire [17:0] sub_wire3; net
72 wire [17:0] q = sub_wire3[17:0];
85 .q (sub_wire3),
H A Dclk_doubler.v54 wire [1:0] sub_wire3 = {sub_wire4, sub_wire2}; net
57 .inclk (sub_wire3),
H A Dpll.v54 wire [1:0] sub_wire3 = {sub_wire4, sub_wire2}; net
57 .inclk (sub_wire3),
H A Ddspclkpll.v57 wire sub_wire3 = inclk0; net
58 wire [1:0] sub_wire4 = {sub_wire5, sub_wire3};
H A Dfifo_2k.v3247 wire [15:0] sub_wire3; net
3252 wire [15:0] q = sub_wire3[15:0];
3265 .q (sub_wire3),
H A Dfifo_4k.v3399 wire [15:0] sub_wire3; net
3404 wire [15:0] q = sub_wire3[15:0];
3417 .q (sub_wire3),