/dports/devel/openocd/openocd-0.11.0/src/flash/nor/ |
H A D | tms470.c | 387 target_read_u32(target, 0xFFE89C08, &fmbbusy); in tms470_check_flash_unlocked() 402 target_read_u32(target, 0xFFFFFFDC, &glbctrl); in tms470_try_flash_keys() 406 target_read_u32(target, 0xFFE8BC0C, &fmmstat); in tms470_try_flash_keys() 420 target_read_u32(target, 0xFFE88004, &fmbac2); in tms470_try_flash_keys() 513 target_read_u32(target, 0xFFE8BC04, &fmmac2); in tms470_flash_initialize_internal_state_machine() 522 target_read_u32(target, 0xFFE8BC00, &fmmac1); in tms470_flash_initialize_internal_state_machine() 863 target_read_u32(target, 0xFFE8BC04, &fmmac2); in tms470_protect() 867 target_read_u32(target, 0xFFE88008, &fmbsea); in tms470_protect() 868 target_read_u32(target, 0xFFE8800C, &fmbseb); in tms470_protect() 914 target_read_u32(target, 0xFFE88004, &fmbac2); in tms470_write() [all …]
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H A D | max32xxx.c | 142 target_read_u32(target, info->flc_base + FLSH_CN, &flsh_cn); in max32xxx_flash_op_pre() 185 target_read_u32(target, info->flc_base + FLSH_CN, &flsh_cn); in max32xxx_flash_op_pre() 202 target_read_u32(target, info->flc_base + FLSH_CN, &flsh_cn); in max32xxx_flash_op_post() 280 target_read_u32(target, info->flc_base + FLSH_CN, &flsh_cn); in max32xxx_erase() 291 target_read_u32(target, info->flc_base + FLSH_CN, &flsh_cn); in max32xxx_erase() 481 target_read_u32(target, info->flc_base + FLSH_CN, &flsh_cn); in max32xxx_write() 507 target_read_u32(target, info->flc_base + FLSH_CN, &flsh_cn); in max32xxx_write() 670 target_read_u32(target, ARM_PID_REG, &arm_id[0]); in max32xxx_probe() 671 target_read_u32(target, ARM_PID_REG+4, &arm_id[1]); in max32xxx_probe() 677 target_read_u32(target, MAX326XX_ID_REG, &max326xx_id); in max32xxx_probe() [all …]
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H A D | stellaris.c | 593 target_read_u32(target, SCB_BASE | RCC, &rcc); in stellaris_read_clock_info() 596 target_read_u32(target, SCB_BASE | RCC2, &rcc2); in stellaris_read_clock_info() 676 target_read_u32(target, SCB_BASE | DID0, &did0); in stellaris_read_part_info() 677 target_read_u32(target, SCB_BASE | DID1, &did1); in stellaris_read_part_info() 829 target_read_u32(target, fmppe_addr, &fmppe); in stellaris_protect_check() 886 target_read_u32(target, FLASH_FMC, &flash_fmc); in stellaris_erase() 961 target_read_u32(target, fmppe_addr, &fmppe); in stellaris_protect() 984 target_read_u32(target, FLASH_FMC, &flash_fmc); in stellaris_protect() 1197 target_read_u32(target, FLASH_FMC, &flash_fmc); in stellaris_write() 1221 target_read_u32(target, FLASH_FMC, &flash_fmc); in stellaris_write() [all …]
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H A D | nrf5.c | 329 res = target_read_u32(chip->target, NRF5_NVMC_READY, &ready); in nrf5_wait_for_nvmc() 452 res = target_read_u32(chip->target, NRF51_FICR_CLENR0, in nrf5_protect_check_clenr0() 460 res = target_read_u32(chip->target, NRF51_UICR_CLENR0, in nrf5_protect_check_clenr0() 536 res = target_read_u32(chip->target, NRF51_FICR_PPFC, in nrf5_protect_clenr0() 548 res = target_read_u32(chip->target, NRF51_UICR_CLENR0, in nrf5_protect_clenr0() 769 res = target_read_u32(target, NRF5_FICR_CONFIGID, &configid); in nrf5_probe() 811 res = target_read_u32(chip->target, NRF5_FICR_CODEPAGESIZE, in nrf5_probe() 904 res = target_read_u32(chip->target, NRF51_FICR_PPFC, in nrf5_erase_page() 1229 res = target_read_u32(target, NRF51_FICR_PPFC, in COMMAND_HANDLER() 1320 res = target_read_u32(chip->target, ficr[i].address, in COMMAND_HANDLER() [all …]
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H A D | mrvlqspi.c | 122 retval = target_read_u32(target, in mrvlqspi_set_conf() 140 retval = target_read_u32(target, in mrvlqspi_set_ss_state() 157 retval = target_read_u32(target, in mrvlqspi_set_ss_state() 183 retval = target_read_u32(target, in mrvlqspi_start_transfer() 212 retval = target_read_u32(target, in mrvlqspi_stop_transfer() 227 retval = target_read_u32(target, in mrvlqspi_stop_transfer() 241 retval = target_read_u32(target, in mrvlqspi_stop_transfer() 268 retval = target_read_u32(target, in mrvlqspi_fifo_flush() 282 retval = target_read_u32(target, in mrvlqspi_fifo_flush() 306 retval = target_read_u32(target, in mrvlqspi_read_byte() [all …]
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H A D | at91sam4l.c | 143 res = target_read_u32(target, SAM4L_FLASHCALW + SAM4L_FSR, &st); in sam4l_flash_wait_until_ready() 154 res = target_read_u32(target, SAM4L_FLASHCALW + SAM4L_FSR, &st); in sam4l_flash_check_error() 178 res = target_read_u32(target, SAM4L_FLASHCALW + SAM4L_FCMD, &fcmd); in sam4l_flash_command() 256 res = target_read_u32(bank->target, SAM4L_FLASHCALW + SAM4L_FSR, &st); in sam4l_check_page_erased() 277 res = target_read_u32(bank->target, SAM4L_CHIPID + SAM4L_CIDR, &id); in sam4l_probe() 283 res = target_read_u32(bank->target, SAM4L_CHIPID + SAM4L_EXID, &exid); in sam4l_probe() 311 res = target_read_u32(bank->target, SAM4L_FLASHCALW + SAM4L_FPR, ¶m); in sam4l_probe() 373 res = target_read_u32(bank->target, SAM4L_FLASHCALW + SAM4L_FSR, &st); in sam4l_protect_check()
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H A D | mdr.c | 97 retval = target_read_u32(target, FLASH_CMD, &flash_cmd); in mdr_mass_erase() 141 retval = target_read_u32(target, MD_PER_CLOCK, &cur_per_clock); in mdr_erase() 158 retval = target_read_u32(target, FLASH_CMD, &flash_cmd); in mdr_erase() 344 retval = target_read_u32(target, MD_PER_CLOCK, &cur_per_clock); in mdr_write() 363 retval = target_read_u32(target, FLASH_CMD, &flash_cmd); in mdr_write() 500 retval = target_read_u32(target, MD_PER_CLOCK, &cur_per_clock); in mdr_read() 519 retval = target_read_u32(target, FLASH_CMD, &flash_cmd); in mdr_read() 540 retval = target_read_u32(target, FLASH_DO, &buf); in mdr_read()
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H A D | sim3x.c | 233 ret = target_read_u32(target, FLASHCTRL0_CONFIG_ALL, &temp); in sim3x_erase_page() 316 ret = target_read_u32(target, FLASHCTRL0_CONFIG_ALL, &temp); in sim3x_flash_erase() 537 ret = target_read_u32(bank->target, LOCK_WORD_ADDRESS, &lock_word); in sim3x_flash_lock_check() 649 ret = target_read_u32(bank->target, DEVICEID0_DEVICEID2, &device_id); in sim3x_read_deviceid() 658 ret = target_read_u32(bank->target, DEVICEID0_DEVICEID1, &device_id); in sim3x_read_deviceid() 677 ret = target_read_u32(bank->target, DEVICEID0_DEVICEID0, &device_id); in sim3x_read_deviceid() 749 ret = target_read_u32(bank->target, CPUID, &cpuid); in sim3x_read_info() 1009 ret = target_read_u32(target, CPUID, &val); in COMMAND_HANDLER() 1029 ret = target_read_u32(target, CPUID, &val); in COMMAND_HANDLER() 1047 ret = target_read_u32(target, LOCK_WORD_ADDRESS, &val); in COMMAND_HANDLER()
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H A D | stm32lx.c | 385 retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_WRPR, in stm32lx_protect_check() 722 retval = target_read_u32(target, DBGMCU_IDCODE_L0, id); in stm32lx_read_id_code() 725 retval = target_read_u32(target, DBGMCU_IDCODE, id); in stm32lx_read_id_code() 971 retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR, in stm32lx_unlock_program_memory() 991 retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR, in stm32lx_unlock_program_memory() 1011 retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR, in stm32lx_unlock_program_memory() 1038 retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR, in stm32lx_enable_write_half_page() 1049 retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR, in stm32lx_enable_write_half_page() 1070 retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR, in stm32lx_lock_program_memory() 1081 retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR, in stm32lx_lock_program_memory() [all …]
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H A D | niietcm4.c | 160 retval = target_read_u32(target, FCIS, &flash_status); in niietcm4_opstatus_check() 165 retval = target_read_u32(target, FCIS, &flash_status); in niietcm4_opstatus_check() 197 retval = target_read_u32(target, UFCIS, &uflash_status); in niietcm4_uopstatus_check() 202 retval = target_read_u32(target, UFCIS, &uflash_status); in niietcm4_uopstatus_check() 255 retval = target_read_u32(target, UFMD, &dump[i]); in niietcm4_dump_uflash_page() 426 retval = target_read_u32(target, UFMD, &uflash_data); in COMMAND_HANDLER() 620 retval = target_read_u32(target, UFMD, &uflash_data); in COMMAND_HANDLER() 643 retval = target_read_u32(target, UFMD, &uflash_data); in COMMAND_HANDLER() 1103 retval = target_read_u32(target, UFMD, &uflash_data); in niietcm4_protect_check() 1127 retval = target_read_u32(target, UFMD, &uflash_data); in niietcm4_protect_check() [all …]
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H A D | aducm360.c | 111 target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEESTA, &value); in aducm360_mass_erase() 140 target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEESTA, &value); in aducm360_page_erase() 465 target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEESTA, &value); in aducm360_write_modified() 473 target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEESTA, &value); in aducm360_write_modified() 518 target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEECON0, &value); in aducm360_set_write_enable() 540 target_read_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEESTA, &v); in aducm360_check_flash_completion()
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H A D | msp432.c | 213 retval = target_read_u32(target, ALGO_RETURN_CODE_ADDR, &return_code); in msp432_wait_return_code() 255 retval = target_read_u32(target, status_addr, &status_code); in msp432_wait_inactive() 828 retval = target_read_u32(target, P4_FLASH_MAIN_SIZE_REG, &size); in msp432_probe() 836 retval = target_read_u32(target, E4_DID0_REG, &device_id); in msp432_probe() 842 retval = target_read_u32(target, E4_DID1_REG, &hardware_rev); in msp432_probe() 851 retval = target_read_u32(target, P4_DEVICE_ID_REG, &device_id); in msp432_probe() 857 retval = target_read_u32(target, P4_HARDWARE_REV_REG, &hardware_rev); in msp432_probe() 870 retval = target_read_u32(target, P4_FLASH_MAIN_SIZE_REG, &size); in msp432_probe() 880 retval = target_read_u32(target, P4_FLASH_INFO_SIZE_REG, &size); in msp432_probe()
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H A D | bluenrg-x.c | 122 return target_read_u32(bank->target, bluenrgx_get_flash_reg(bank, reg_offset), value); in bluenrgx_read_flash_reg() 347 retval = target_read_u32(target, source->address+4, &rp); in bluenrgx_write() 373 int retval = target_read_u32(bank->target, BLUENRGLP_JTAG_REG, &idcode); in bluenrgx_probe() 379 retval = target_read_u32(bank->target, BLUENRG2_JTAG_REG, &idcode); in bluenrgx_probe() 399 retval = target_read_u32(bank->target, DIE_ID_REG(bluenrgx_info), &die_id); in bluenrgx_probe()
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H A D | efm32.c | 213 return target_read_u32(bank->target, base + offset, value); in efm32x_read_reg_u32() 234 ret = target_read_u32(bank->target, CPUID, &cpuid); in efm32x_read_info() 516 ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+i*4, ptr); in efm32x_read_lock_data() 527 ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+126*4, ptr); in efm32x_read_lock_data() 535 ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+127*4, ptr); in efm32x_read_lock_data() 543 ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+125*4, ptr); in efm32x_read_lock_data() 551 ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+124*4, ptr); in efm32x_read_lock_data() 559 ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+123*4, ptr); in efm32x_read_lock_data() 567 ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+122*4, ptr); in efm32x_read_lock_data()
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H A D | stm32f2x.c | 331 int retval = target_read_u32(target, STM32_FLASH_CR, &ctrl); in stm32x_unlock_reg() 347 retval = target_read_u32(target, STM32_FLASH_CR, &ctrl); in stm32x_unlock_reg() 363 int retval = target_read_u32(target, STM32_FLASH_OPTCR, &ctrl); in stm32x_unlock_option_reg() 379 retval = target_read_u32(target, STM32_FLASH_OPTCR, &ctrl); in stm32x_unlock_option_reg() 400 int retval = target_read_u32(target, STM32_FLASH_OPTCR, &optiondata); in stm32x_read_options() 418 retval = target_read_u32(target, STM32_FLASH_OPTCR1, &optiondata); in stm32x_read_options() 433 retval = target_read_u32(target, STM32_FLASH_OPTCR2, &optiondata); in stm32x_read_options() 974 int retval = target_read_u32(target, 0xE0042000, device_id); in stm32x_get_device_id() 980 retval = target_read_u32(target, 0xE000ED00, &cpuid); in stm32x_get_device_id() 1155 retval = target_read_u32(target, STM32_FLASH_OPTCR, &optiondata); in stm32x_probe() [all …]
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H A D | numicro.c | 1146 retval = target_read_u32(target, NUMICRO_SYS_WRPROT, &is_protected); in numicro_reg_unlock() 1164 retval = target_read_u32(target, NUMICRO_SYS_WRPROT, &is_protected); in numicro_reg_unlock() 1192 retval = target_read_u32(target, NUMICRO_SYSCLK_AHBCLK, ®_stat); in numicro_init_isp() 1202 retval = target_read_u32(target, NUMICRO_FLASH_ISPCON, ®_stat); in numicro_init_isp() 1243 retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status); in numicro_fmc_cmd() 1256 retval = target_read_u32(target, NUMICRO_FLASH_ISPDAT, rdata); in numicro_fmc_cmd() 1512 retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status); in numicro_erase() 1526 retval = target_read_u32(target, NUMICRO_FLASH_ISPCON, &status); in numicro_erase() 1601 retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status); in numicro_write() 1618 retval = target_read_u32(target, NUMICRO_FLASH_ISPCON, &status); in numicro_write() [all …]
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H A D | psoc6.c | 248 hr = target_read_u32(target, MEM_IPC_LOCK_STATUS(ipc_id), ®_val); in ipc_poll_lock_stat() 298 hr = target_read_u32(target, MEM_IPC_ACQUIRE(ipc_id), ®_val); in ipc_acquire() 364 hr = target_read_u32(target, working_area, data_out); in call_sromapi() 366 hr = target_read_u32(target, MEM_IPC_DATA(IPC_ID), data_out); in call_sromapi() 573 target_read_u32(target, PSOC6_SPCIF_GEOMETRY, &geom); in psoc6_probe() 924 hr = target_read_u32(target, vt_offset_reg, &vt_base); in handle_reset_halt() 934 hr = target_read_u32(target, vt_base + 4, &reset_addr); in handle_reset_halt()
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H A D | xmc4xxx.c | 347 res = target_read_u32(bank->target, SCU_REG_BASE + SCU_ID_CHIP, &devid); in xmc4xxx_probe() 362 res = target_read_u32(bank->target, FLASH_REG_FLASH0_ID, in xmc4xxx_probe() 442 res = target_read_u32(bank->target, FLASH_REG_FLASH0_FSR, status); in xmc4xxx_get_flash_status() 517 res = target_read_u32(bank->target, FLASH_REG_FLASH0_FSR, &status); in xmc4xxx_erase_sector() 819 int res = target_read_u32(bank->target, SCU_REG_BASE + SCU_ID_CHIP, &scu_idcode); in xmc4xxx_get_info_command() 1180 ret = target_read_u32(bank->target, FLASH_REG_FLASH0_PROCON0, &protection[0]); in xmc4xxx_protect_check() 1186 ret = target_read_u32(bank->target, FLASH_REG_FLASH0_PROCON1, &protection[1]); in xmc4xxx_protect_check() 1192 ret = target_read_u32(bank->target, FLASH_REG_FLASH0_PROCON2, &protection[2]); in xmc4xxx_protect_check()
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/dports/devel/openocd/openocd-0.11.0/src/rtos/ |
H A D | FreeRTOS.c | 185 retval = target_read_u32(rtos->target, in FreeRTOS_update_threads() 202 retval = target_read_u32(rtos->target, in FreeRTOS_update_threads() 253 retval = target_read_u32(rtos->target, in FreeRTOS_update_threads() 298 retval = target_read_u32(rtos->target, in FreeRTOS_update_threads() 315 retval = target_read_u32(rtos->target, in FreeRTOS_update_threads() 331 retval = target_read_u32(rtos->target, in FreeRTOS_update_threads() 386 retval = target_read_u32(rtos->target, in FreeRTOS_update_threads() 425 retval = target_read_u32(rtos->target, in FreeRTOS_get_thread_reg_list() 445 retval = target_read_u32(rtos->target, FPU_CPACR, &cpacr); in FreeRTOS_get_thread_reg_list() 462 retval = target_read_u32(rtos->target, in FreeRTOS_get_thread_reg_list()
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H A D | chromium-ec.c | 145 return target_read_u32(rtos->target, in chromium_ec_get_current_task_ptr() 155 ret = target_read_u32(rtos->target, in chromium_ec_get_num_tasks() 216 ret = target_read_u32(rtos->target, rtos->symbols[CHROMIUM_EC_VAL_start_called].address, in chromium_ec_update_threads() 244 ret = target_read_u32(rtos->target, rtos->symbols[CHROMIUM_EC_VAL_tasks_enabled].address, in chromium_ec_update_threads() 252 ret = target_read_u32(rtos->target, rtos->symbols[CHROMIUM_EC_VAL_tasks_ready].address, in chromium_ec_update_threads() 270 ret = target_read_u32(rtos->target, in chromium_ec_update_threads() 295 ret = target_read_u32(rtos->target, in chromium_ec_update_threads() 350 ret = target_read_u32(rtos->target, in chromium_ec_get_thread_reg_list()
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H A D | chibios.c | 252 retval = target_read_u32(rtos->target, FPU_CPACR, &cpacr); in chibios_update_stacking() 317 retval = target_read_u32(rtos->target, in chibios_update_threads() 332 retval = target_read_u32(rtos->target, in chibios_update_threads() 387 retval = target_read_u32(rtos->target, in chibios_update_threads() 402 retval = target_read_u32(rtos->target, in chibios_update_threads() 454 retval = target_read_u32(rtos->target, in chibios_update_threads() 490 retval = target_read_u32(rtos->target, in chibios_get_thread_reg_list()
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H A D | riot.c | 216 retval = target_read_u32(rtos->target, in riot_update_threads() 267 retval = target_read_u32(rtos->target, in riot_update_threads() 338 retval = target_read_u32(rtos->target, in riot_get_thread_reg_list() 348 retval = target_read_u32(rtos->target, in riot_get_thread_reg_list()
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/dports/devel/openocd/openocd-0.11.0/src/flash/nand/ |
H A D | davinci.c | 90 target_read_u32(target, info->aemif + NANDFCR, &nandfcr); in davinci_init() 120 target_read_u32(target, info->aemif + NANDFSR, &nandfsr); in davinci_nand_ready() 193 target_read_u32(target, nfdata, &tmp); in davinci_read_block_data() 419 target_read_u32(target, ecc1_addr, &ecc1); in davinci_write_page_ecc1() 421 target_read_u32(target, fcr_addr, &fcr); in davinci_write_page_ecc1() 436 target_read_u32(target, ecc1_addr, &ecc1); in davinci_write_page_ecc1() 510 target_read_u32(target, info->aemif + NANDERRVAL, &ecc4); in davinci_write_page_ecc4() 512 target_read_u32(target, fcr_addr, &fcr); in davinci_write_page_ecc4() 530 target_read_u32(target, ecc4_addr + 4 * i, &raw_ecc[i]); in davinci_write_page_ecc4() 571 target_read_u32(target, info->aemif + NANDERRVAL, &ecc4); in davinci_write_page_ecc4infix() [all …]
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H A D | lpc3180.c | 107 target_read_u32(target, 0x40004050, &sysclk_ctrl); in lpc3180_cycle_time() 115 target_read_u32(target, 0x40004044, &pwr_ctrl); in lpc3180_cycle_time() 120 target_read_u32(target, 0x40004058, &hclkpll_ctrl); in lpc3180_cycle_time() 123 target_read_u32(target, 0x40004040, &hclkdiv_ctrl); in lpc3180_cycle_time() 406 target_read_u32(target, 0x20020000, &data32); in lpc3180_read_data() 900 target_read_u32(target, 0x200b8048, &mlc_isr); in lpc3180_read_page() 1189 target_read_u32(target, 0x20020018, &status); in lpc3180_controller_ready() 1232 target_read_u32(target, 0x20020018, &status); in lpc3180_nand_ready() 1264 target_read_u32(target, 0x2002001c, &status); in lpc3180_tc_ready()
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H A D | at91sam9.c | 240 target_read_u32(target, info->busy.pioc + AT91C_PIOx_PDSR, &status); in at91sam9_nand_ready() 387 target_read_u32(target, info->ecc + AT91C_ECCx_SR, &status); in at91sam9_read_page() 396 target_read_u32(target, in at91sam9_read_page() 465 target_read_u32(target, info->ecc + AT91C_ECCx_PR, &parity); in at91sam9_write_page() 466 target_read_u32(target, info->ecc + AT91C_ECCx_NPR, &nparity); in at91sam9_write_page()
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