| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/ |
| H A D | translate.c | 1620 #define tcg_gen_st_f32 tcg_gen_st_i32 macro
1644 tcg_gen_st_f32(cpu_F0s, cpu_env, vfp_reg_offset(dp, reg)); in gen_mov_vreg_F0()
3128 tcg_gen_st_f32(dest, cpu_env, vfp_reg_offset(dp, rd)); in handle_vsel()
3177 tcg_gen_st_f32(dest, cpu_env, vfp_reg_offset(dp, rd)); in handle_vminmaxnm()
3213 tcg_gen_st_f32(tcg_res, cpu_env, vfp_reg_offset(dp, rd)); in handle_vrint()
3254 tcg_gen_st_f32(tcg_tmp, cpu_env, vfp_reg_offset(0, rd)); in handle_vcvt()
3268 tcg_gen_st_f32(tcg_res, cpu_env, vfp_reg_offset(0, rd)); in handle_vcvt()
7344 tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 0)); in disas_neon_data_insn()
7347 tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 1)); in disas_neon_data_insn()
7351 tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 2)); in disas_neon_data_insn()
[all …]
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| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-arm/ |
| H A D | translate.c | 1347 #define tcg_gen_st_f32 tcg_gen_st_i32 macro
1374 tcg_gen_st_f32(tcg_ctx, tcg_ctx->cpu_F0s, tcg_ctx->cpu_env, vfp_reg_offset(dp, reg)); in gen_mov_vreg_F0()
2898 tcg_gen_st_f32(tcg_ctx, dest, tcg_ctx->cpu_env, vfp_reg_offset(dp, rd)); in handle_vsel()
2948 tcg_gen_st_f32(tcg_ctx, dest, tcg_ctx->cpu_env, vfp_reg_offset(dp, rd)); in handle_vminmaxnm()
2985 tcg_gen_st_f32(tcg_ctx, tcg_res, tcg_ctx->cpu_env, vfp_reg_offset(dp, rd)); in handle_vrint()
3027 tcg_gen_st_f32(tcg_ctx, tcg_tmp, tcg_ctx->cpu_env, vfp_reg_offset(0, rd)); in handle_vcvt()
3041 tcg_gen_st_f32(tcg_ctx, tcg_res, tcg_ctx->cpu_env, vfp_reg_offset(0, rd)); in handle_vcvt()
6734 … tcg_gen_st_f32(tcg_ctx, tcg_ctx->cpu_F0s, tcg_ctx->cpu_env, neon_reg_offset(rd, 0)); in disas_neon_data_insn()
6737 … tcg_gen_st_f32(tcg_ctx, tcg_ctx->cpu_F0s, tcg_ctx->cpu_env, neon_reg_offset(rd, 1)); in disas_neon_data_insn()
6741 … tcg_gen_st_f32(tcg_ctx, tcg_ctx->cpu_F0s, tcg_ctx->cpu_env, neon_reg_offset(rd, 2)); in disas_neon_data_insn()
[all …]
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| /dports/emulators/unicorn/unicorn-1.0.2/qemu/target-arm/ |
| H A D | translate.c | 1347 #define tcg_gen_st_f32 tcg_gen_st_i32 macro
1374 tcg_gen_st_f32(tcg_ctx, tcg_ctx->cpu_F0s, tcg_ctx->cpu_env, vfp_reg_offset(dp, reg)); in gen_mov_vreg_F0()
2898 tcg_gen_st_f32(tcg_ctx, dest, tcg_ctx->cpu_env, vfp_reg_offset(dp, rd)); in handle_vsel()
2948 tcg_gen_st_f32(tcg_ctx, dest, tcg_ctx->cpu_env, vfp_reg_offset(dp, rd)); in handle_vminmaxnm()
2985 tcg_gen_st_f32(tcg_ctx, tcg_res, tcg_ctx->cpu_env, vfp_reg_offset(dp, rd)); in handle_vrint()
3027 tcg_gen_st_f32(tcg_ctx, tcg_tmp, tcg_ctx->cpu_env, vfp_reg_offset(0, rd)); in handle_vcvt()
3041 tcg_gen_st_f32(tcg_ctx, tcg_res, tcg_ctx->cpu_env, vfp_reg_offset(0, rd)); in handle_vcvt()
6734 … tcg_gen_st_f32(tcg_ctx, tcg_ctx->cpu_F0s, tcg_ctx->cpu_env, neon_reg_offset(rd, 0)); in disas_neon_data_insn()
6737 … tcg_gen_st_f32(tcg_ctx, tcg_ctx->cpu_F0s, tcg_ctx->cpu_env, neon_reg_offset(rd, 1)); in disas_neon_data_insn()
6741 … tcg_gen_st_f32(tcg_ctx, tcg_ctx->cpu_F0s, tcg_ctx->cpu_env, neon_reg_offset(rd, 2)); in disas_neon_data_insn()
[all …]
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| /dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/target-arm/ |
| H A D | translate.c | 1085 #define tcg_gen_st_f32 tcg_gen_st_i32 macro
1109 tcg_gen_st_f32(cpu_F0s, cpu_env, vfp_reg_offset(dp, reg)); in gen_mov_vreg_F0()
4806 tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, pass)); in disas_neon_data_insn()
5421 tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 0)); in disas_neon_data_insn()
5424 tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 1)); in disas_neon_data_insn()
5428 tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 2)); in disas_neon_data_insn()
5431 tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 3)); in disas_neon_data_insn()
5617 tcg_gen_st_f32(cpu_F0s, cpu_env, in disas_neon_data_insn()
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