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Searched refs:tcs_num_patches (Results 1 – 25 of 54) sorted by relevance

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/dports/lang/clover/mesa-21.3.6/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h77 unsigned tcs_num_patches,
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h77 unsigned tcs_num_patches,
/dports/graphics/libosmesa/mesa-21.3.6/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h77 unsigned tcs_num_patches,
/dports/graphics/mesa-libs/mesa-21.3.6/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h77 unsigned tcs_num_patches,
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h77 unsigned tcs_num_patches,
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h77 unsigned tcs_num_patches,
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h77 unsigned tcs_num_patches,
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h77 unsigned tcs_num_patches,
/dports/graphics/mesa-dri/mesa-21.3.6/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_build_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h77 unsigned tcs_num_patches,
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c300 nir_ssa_def *tcs_num_patches = nir_load_tcs_num_patches_amd(b); in hs_output_lds_offset() local
302 nir_ssa_def *output_patch0_offset = nir_imul(b, input_patch_size, tcs_num_patches); in hs_output_lds_offset()
333 nir_ssa_def *tcs_num_patches = nir_load_tcs_num_patches_amd(b); in hs_per_vertex_output_vmem_offset() local
356 nir_ssa_def *tcs_num_patches = nir_load_tcs_num_patches_amd(b); in hs_per_patch_output_vmem_offset() local
358 nir_ssa_def *per_patch_data_offset = nir_imul(b, tcs_num_patches, per_vertex_output_patch_size); in hs_per_patch_output_vmem_offset()
361 ? nir_build_calc_io_offset(b, intrin, nir_imul_imm(b, tcs_num_patches, 16u), 4u) in hs_per_patch_output_vmem_offset()
365 off = nir_iadd_nuw(b, off, nir_imul_imm(b, tcs_num_patches, const_base_offset)); in hs_per_patch_output_vmem_offset()
711 unsigned tcs_num_patches; member
740 return nir_imm_int(b, st->tcs_num_patches); in lower_tess_intrinsics_to_const()
749 unsigned tcs_num_patches, in ac_nir_lower_tess_to_const() argument
[all …]
H A Dac_nir.h90 unsigned tcs_num_patches,
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/amd/vulkan/
H A Dradv_shader.h542 unsigned tcs_num_patches, in calculate_tess_lds_size() argument
554 unsigned output_patch0_offset = input_patch_size * tcs_num_patches; in calculate_tess_lds_size()
556 unsigned lds_size = output_patch0_offset + output_patch_size * tcs_num_patches; in calculate_tess_lds_size()
/dports/lang/clover/mesa-21.3.6/src/amd/compiler/
H A Daco_instruction_selection.h99 uint32_t tcs_num_patches; member
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/compiler/
H A Daco_instruction_selection.h99 uint32_t tcs_num_patches; member
/dports/graphics/libosmesa/mesa-21.3.6/src/amd/compiler/
H A Daco_instruction_selection.h99 uint32_t tcs_num_patches; member
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/compiler/
H A Daco_instruction_selection.h99 uint32_t tcs_num_patches; member

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