/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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H A D | brw_fs_nir.cpp | 2712 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in get_tcs_single_patch_icp_handle() local 2724 } else if (tcs_prog_data->instances == 1 && vertex_intrin && in get_tcs_single_patch_icp_handle() 2756 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in get_tcs_eight_patch_icp_handle() local 2759 unsigned first_icp_handle = tcs_prog_data->include_primitive_id ? 3 : 2; in get_tcs_eight_patch_icp_handle() 2824 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in nir_emit_tcs_intrinsic() local 2825 struct brw_vue_prog_data *vue_prog_data = &tcs_prog_data->base; in nir_emit_tcs_intrinsic() 2848 if (tcs_prog_data->instances == 1) in nir_emit_tcs_intrinsic() 2872 brw_imm_ud(tcs_prog_data->instances << 8 | (1 << 15))); in nir_emit_tcs_intrinsic() 2883 brw_imm_ud(tcs_prog_data->instances << 9 | (1 << 15))); in nir_emit_tcs_intrinsic()
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/dports/lang/clover/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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H A D | brw_fs_nir.cpp | 2712 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in get_tcs_single_patch_icp_handle() local 2724 } else if (tcs_prog_data->instances == 1 && vertex_intrin && in get_tcs_single_patch_icp_handle() 2756 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in get_tcs_eight_patch_icp_handle() local 2759 unsigned first_icp_handle = tcs_prog_data->include_primitive_id ? 3 : 2; in get_tcs_eight_patch_icp_handle() 2824 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in nir_emit_tcs_intrinsic() local 2825 struct brw_vue_prog_data *vue_prog_data = &tcs_prog_data->base; in nir_emit_tcs_intrinsic() 2848 if (tcs_prog_data->instances == 1) in nir_emit_tcs_intrinsic() 2872 brw_imm_ud(tcs_prog_data->instances << 8 | (1 << 15))); in nir_emit_tcs_intrinsic() 2883 brw_imm_ud(tcs_prog_data->instances << 9 | (1 << 15))); in nir_emit_tcs_intrinsic()
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/dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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H A D | brw_fs_nir.cpp | 2619 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in get_tcs_single_patch_icp_handle() local 2631 } else if (tcs_prog_data->instances == 1 && vertex_intrin && in get_tcs_single_patch_icp_handle() 2663 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in get_tcs_eight_patch_icp_handle() local 2666 unsigned first_icp_handle = tcs_prog_data->include_primitive_id ? 3 : 2; in get_tcs_eight_patch_icp_handle() 2731 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in nir_emit_tcs_intrinsic() local 2732 struct brw_vue_prog_data *vue_prog_data = &tcs_prog_data->base; in nir_emit_tcs_intrinsic() 2755 if (tcs_prog_data->instances == 1) in nir_emit_tcs_intrinsic() 2781 brw_imm_ud(tcs_prog_data->instances << 9 | (1 << 15))); in nir_emit_tcs_intrinsic() 2784 brw_imm_ud(tcs_prog_data->instances << 8 | (1 << 15))); in nir_emit_tcs_intrinsic()
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/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 108 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 116 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1657 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1675 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1680 hs.InstanceCount = tcs_prog_data->instances - 1; 1685 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1688 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1700 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1704 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1705 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/ |
H A D | brw_vec4_tcs.cpp | 107 struct brw_tcs_prog_data *tcs_prog_data = in emit_thread_end() local 115 if (tcs_prog_data->instances > 1) { in emit_thread_end()
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/dports/lang/clover/mesa-21.3.6/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1861 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1879 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1884 hs.InstanceCount = tcs_prog_data->instances - 1; 1889 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1892 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1908 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1912 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1913 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1861 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1879 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1884 hs.InstanceCount = tcs_prog_data->instances - 1; 1889 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1892 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1908 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1912 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1913 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/libosmesa/mesa-21.3.6/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1861 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1879 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1884 hs.InstanceCount = tcs_prog_data->instances - 1; 1889 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1892 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1908 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1912 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1913 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1861 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1879 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1884 hs.InstanceCount = tcs_prog_data->instances - 1; 1889 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1892 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1908 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1912 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1913 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1861 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1879 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1884 hs.InstanceCount = tcs_prog_data->instances - 1; 1889 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1892 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1908 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1912 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1913 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1861 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1879 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1884 hs.InstanceCount = tcs_prog_data->instances - 1; 1889 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1892 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1908 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1912 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1913 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1861 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1879 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1884 hs.InstanceCount = tcs_prog_data->instances - 1; 1889 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1892 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1908 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1912 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1913 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1861 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1879 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1884 hs.InstanceCount = tcs_prog_data->instances - 1; 1889 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1892 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1908 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1912 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1913 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/vulkan/ |
H A D | genX_pipeline.c | 1861 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 1879 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 1884 hs.InstanceCount = tcs_prog_data->instances - 1; 1889 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 1892 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 1908 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 1912 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 1913 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/vulkan/ |
H A D | genX_pipeline.c | 2019 const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); local 2037 assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances); 2042 hs.InstanceCount = tcs_prog_data->instances - 1; 2047 tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f; 2050 tcs_prog_data->base.base.dispatch_grf_start_reg >> 5; 2066 hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold; 2070 hs.DispatchMode = tcs_prog_data->base.dispatch_mode; 2071 hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
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