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Searched refs:tie_hi (Results 1 – 2 of 2) sorted by relevance

/dports/cad/iverilog/verilog-11.0/
H A Dsynth2.cc100 if (enable_i.is_linked(scope->tie_hi())) { in qualify_enable()
125 if ( enable_1.is_linked(scope->tie_hi()) && in multiplex_enables()
126 enable_0.is_linked(scope->tie_hi()) ) { in multiplex_enables()
127 connect(enable_o, scope->tie_hi()); in multiplex_enables()
141 if (enable_1.is_linked(scope->tie_hi())) { in multiplex_enables()
146 if (enable_0.is_linked(scope->tie_hi())) { in multiplex_enables()
171 if (top_enable.is_linked(scope->tie_hi())) in merge_sequential_enables()
174 if (sub_enable.is_linked(scope->tie_hi())) in merge_sequential_enables()
505 connect(enables.pin(ptr), scope->tie_hi()); in synth_async()
1002 if (!tmp_ena.pin(mdx).is_linked(scope->tie_hi())) in synth_async()
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H A Dnetlist.h1187 Link&tie_hi() const { return tie_hi_->pin(0); }; in tie_hi() function