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Searched refs:timerirqs (Results 1 – 18 of 18) sorted by relevance

/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/intc/
H A Dbcm2836_control.c83 if (s->timerirqs[i]) { in bcm2836_control_update()
84 assert(s->timerirqs[i] < (1 << (IRQ_CNTVIRQ + 1))); /* sane mask? */ in bcm2836_control_update()
86 if ((s->timerirqs[i] & (1 << j)) != 0) { in bcm2836_control_update()
117 s->timerirqs[core] = deposit32(s->timerirqs[core], local_irq, 1, !!level); in bcm2836_control_set_local_irq()
/dports/emulators/qemu42/qemu-4.2.1/hw/intc/
H A Dbcm2836_control.c112 if (s->timerirqs[i]) { in bcm2836_control_update()
113 assert(s->timerirqs[i] < (1 << (IRQ_CNTVIRQ + 1))); /* sane mask? */ in bcm2836_control_update()
115 if ((s->timerirqs[i] & (1 << j)) != 0) { in bcm2836_control_update()
146 s->timerirqs[core] = deposit32(s->timerirqs[core], local_irq, 1, !!level); in bcm2836_control_set_local_irq()
/dports/emulators/qemu/qemu-6.2.0/hw/intc/
H A Dbcm2836_control.c114 if (s->timerirqs[i]) { in bcm2836_control_update()
115 assert(s->timerirqs[i] < (1 << (IRQ_CNTVIRQ + 1))); /* sane mask? */ in bcm2836_control_update()
117 if ((s->timerirqs[i] & (1 << j)) != 0) { in bcm2836_control_update()
148 s->timerirqs[core] = deposit32(s->timerirqs[core], local_irq, 1, !!level); in bcm2836_control_set_local_irq()
/dports/emulators/qemu60/qemu-6.0.0/hw/intc/
H A Dbcm2836_control.c114 if (s->timerirqs[i]) { in bcm2836_control_update()
115 assert(s->timerirqs[i] < (1 << (IRQ_CNTVIRQ + 1))); /* sane mask? */ in bcm2836_control_update()
117 if ((s->timerirqs[i] & (1 << j)) != 0) { in bcm2836_control_update()
148 s->timerirqs[core] = deposit32(s->timerirqs[core], local_irq, 1, !!level); in bcm2836_control_set_local_irq()
/dports/emulators/qemu5/qemu-5.2.0/hw/intc/
H A Dbcm2836_control.c114 if (s->timerirqs[i]) { in bcm2836_control_update()
115 assert(s->timerirqs[i] < (1 << (IRQ_CNTVIRQ + 1))); /* sane mask? */ in bcm2836_control_update()
117 if ((s->timerirqs[i] & (1 << j)) != 0) { in bcm2836_control_update()
148 s->timerirqs[core] = deposit32(s->timerirqs[core], local_irq, 1, !!level); in bcm2836_control_set_local_irq()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/intc/
H A Dbcm2836_control.c112 if (s->timerirqs[i]) { in bcm2836_control_update()
113 assert(s->timerirqs[i] < (1 << (IRQ_CNTVIRQ + 1))); /* sane mask? */ in bcm2836_control_update()
115 if ((s->timerirqs[i] & (1 << j)) != 0) { in bcm2836_control_update()
146 s->timerirqs[core] = deposit32(s->timerirqs[core], local_irq, 1, !!level); in bcm2836_control_set_local_irq()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/intc/
H A Dbcm2836_control.c114 if (s->timerirqs[i]) {
115 assert(s->timerirqs[i] < (1 << (IRQ_CNTVIRQ + 1))); /* sane mask? */
117 if ((s->timerirqs[i] & (1 << j)) != 0) { in kvm_gic_line_level_access()
148 s->timerirqs[core] = deposit32(s->timerirqs[core], local_irq, 1, !!level);
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/intc/
H A Dbcm2836_control.c112 if (s->timerirqs[i]) { in bcm2836_control_update()
113 assert(s->timerirqs[i] < (1 << (IRQ_CNTVIRQ + 1))); /* sane mask? */ in bcm2836_control_update()
115 if ((s->timerirqs[i] & (1 << j)) != 0) { in bcm2836_control_update()
146 s->timerirqs[core] = deposit32(s->timerirqs[core], local_irq, 1, !!level); in bcm2836_control_set_local_irq()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/
H A Dbcm2836_control.c114 if (s->timerirqs[i]) { in bcm2836_control_update()
115 assert(s->timerirqs[i] < (1 << (IRQ_CNTVIRQ + 1))); /* sane mask? */ in bcm2836_control_update()
117 if ((s->timerirqs[i] & (1 << j)) != 0) { in bcm2836_control_update()
148 s->timerirqs[core] = deposit32(s->timerirqs[core], local_irq, 1, !!level); in bcm2836_control_set_local_irq()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/intc/
H A Dbcm2836_control.h40 uint8_t timerirqs[BCM2836_NCORES]; member
/dports/emulators/qemu/qemu-6.2.0/include/hw/intc/
H A Dbcm2836_control.h45 uint8_t timerirqs[BCM2836_NCORES]; member
/dports/emulators/qemu60/qemu-6.0.0/include/hw/intc/
H A Dbcm2836_control.h45 uint8_t timerirqs[BCM2836_NCORES]; member
/dports/emulators/qemu5/qemu-5.2.0/include/hw/intc/
H A Dbcm2836_control.h45 uint8_t timerirqs[BCM2836_NCORES]; member
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/intc/
H A Dbcm2836_control.h45 uint8_t timerirqs[BCM2836_NCORES]; member
/dports/emulators/qemu42/qemu-4.2.1/include/hw/intc/
H A Dbcm2836_control.h44 uint8_t timerirqs[BCM2836_NCORES]; member
/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/intc/
H A Dbcm2836_control.h44 uint8_t timerirqs[BCM2836_NCORES]; member
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/intc/
H A Dbcm2836_control.h45 uint8_t timerirqs[BCM2836_NCORES]; member
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/intc/
H A Dbcm2836_control.h44 uint8_t timerirqs[BCM2836_NCORES]; member