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Searched refs:tlbiasid_write (Results 1 – 25 of 35) sorted by relevance

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/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dhelper.c265 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
389 NULL, NULL, tlbiasid_write, },
806 NULL, NULL, tlbiasid_write },
816 NULL, NULL, tlbiasid_write },
826 NULL, NULL, tlbiasid_write },
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dhelper.c265 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
389 NULL, NULL, tlbiasid_write, },
806 NULL, NULL, tlbiasid_write },
816 NULL, NULL, tlbiasid_write },
826 NULL, NULL, tlbiasid_write },
/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dhelper.c641 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
873 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
2172 .type = ARM_CP_NO_RAW, .access = PL1_W, .writefn = tlbiasid_write },
2179 .type = ARM_CP_NO_RAW, .access = PL1_W, .writefn = tlbiasid_write },
2186 .type = ARM_CP_NO_RAW, .access = PL1_W, .writefn = tlbiasid_write },
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dhelper.c641 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
873 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
2172 .type = ARM_CP_NO_RAW, .access = PL1_W, .writefn = tlbiasid_write },
2179 .type = ARM_CP_NO_RAW, .access = PL1_W, .writefn = tlbiasid_write },
2186 .type = ARM_CP_NO_RAW, .access = PL1_W, .writefn = tlbiasid_write },
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dhelper.c769 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
966 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
2356 .writefn = tlbiasid_write },
2366 .writefn = tlbiasid_write },
2376 .writefn = tlbiasid_write },
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dhelper.c782 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
1017 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
2403 .writefn = tlbiasid_write },
2413 .writefn = tlbiasid_write },
2423 .writefn = tlbiasid_write },
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Dhelper.c573 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
828 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
1497 .type = ARM_CP_NO_RAW, .access = PL1_W, .writefn = tlbiasid_write },
1504 .type = ARM_CP_NO_RAW, .access = PL1_W, .writefn = tlbiasid_write },
1511 .type = ARM_CP_NO_RAW, .access = PL1_W, .writefn = tlbiasid_write },
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dhelper.c782 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
1017 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
2403 .writefn = tlbiasid_write },
2413 .writefn = tlbiasid_write },
2423 .writefn = tlbiasid_write },
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dhelper.c779 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
976 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
2336 .writefn = tlbiasid_write },
2346 .writefn = tlbiasid_write },
2356 .writefn = tlbiasid_write },
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dhelper.c555 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
752 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
2112 .writefn = tlbiasid_write },
2122 .writefn = tlbiasid_write },
2132 .writefn = tlbiasid_write },
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dhelper.c779 static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri, in tlbiasid_write() function
976 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
2380 .writefn = tlbiasid_write },
2390 .writefn = tlbiasid_write },
2400 .writefn = tlbiasid_write },
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/
H A Daarch64eb.h2920 #define tlbiasid_write tlbiasid_write_aarch64eb macro
H A Darm.h2920 #define tlbiasid_write tlbiasid_write_arm macro
H A Dx86_64.h2920 #define tlbiasid_write tlbiasid_write_x86_64 macro
H A Daarch64.h2920 #define tlbiasid_write tlbiasid_write_aarch64 macro
H A Darmeb.h2920 #define tlbiasid_write tlbiasid_write_armeb macro
H A Dm68k.h2920 #define tlbiasid_write tlbiasid_write_m68k macro
H A Dsparc64.h2920 #define tlbiasid_write tlbiasid_write_sparc64 macro
H A Dsparc.h2920 #define tlbiasid_write tlbiasid_write_sparc macro
/dports/emulators/unicorn/unicorn-1.0.2/qemu/
H A Dm68k.h2920 #define tlbiasid_write tlbiasid_write_m68k macro
H A Dx86_64.h2920 #define tlbiasid_write tlbiasid_write_x86_64 macro
H A Darmeb.h2920 #define tlbiasid_write tlbiasid_write_armeb macro
H A Daarch64.h2920 #define tlbiasid_write tlbiasid_write_aarch64 macro
H A Daarch64eb.h2920 #define tlbiasid_write tlbiasid_write_aarch64eb macro
H A Darm.h2920 #define tlbiasid_write tlbiasid_write_arm macro

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