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Searched refs:tmp906 (Results 1 – 25 of 72) sorted by relevance

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/dports/math/fftw/fftw-2.1.5/rfftw/
H A Dfrc_128.c2175 fftw_real tmp906; in fftw_real2hc_128() local
2233 tmp906 = tmp902 - tmp905; in fftw_real2hc_128()
2246 tmp907 = tmp899 + tmp906; in fftw_real2hc_128()
2265 tmp935 = tmp899 - tmp906; in fftw_real2hc_128()
H A Dfcr_128.c224 fftw_real tmp906; in fftw_hc2real_128() local
1470 tmp906 = tmp837 + tmp836; in fftw_hc2real_128()
2468 tmp908 = tmp906 - tmp907; in fftw_hc2real_128()
2544 tmp941 = tmp906 + tmp907; in fftw_hc2real_128()
/dports/math/fftw-float/fftw-2.1.5/fftw/
H A Dfn_64.c1489 fftw_real tmp906; in fftw_no_twiddle_64() local
1500 tmp906 = K707106781 * (tmp902 + tmp903); in fftw_no_twiddle_64()
1501 c_im(output[40 * ostride]) = tmp905 - tmp906; in fftw_no_twiddle_64()
1502 c_im(output[8 * ostride]) = tmp905 + tmp906; in fftw_no_twiddle_64()
H A Dfni_64.c1884 fftw_real tmp906; in fftwi_no_twiddle_64() local
1891 tmp906 = tmp901 - tmp898; in fftwi_no_twiddle_64()
1892 c_re(output[52 * ostride]) = tmp905 - tmp906; in fftwi_no_twiddle_64()
1893 c_re(output[20 * ostride]) = tmp905 + tmp906; in fftwi_no_twiddle_64()
H A Dftwi_64.c2655 fftw_real tmp906; in fftwi_twiddle_64() local
2662 tmp906 = tmp904 - tmp905; in fftwi_twiddle_64()
2663 c_re(inout[50 * iostride]) = tmp903 - tmp906; in fftwi_twiddle_64()
2664 c_re(inout[18 * iostride]) = tmp903 + tmp906; in fftwi_twiddle_64()
H A Dftw_64.c2651 fftw_real tmp906; in fftw_twiddle_64() local
2658 tmp906 = tmp904 - tmp905; in fftw_twiddle_64()
2659 c_re(inout[54 * iostride]) = tmp903 - tmp906; in fftw_twiddle_64()
2660 c_re(inout[22 * iostride]) = tmp903 + tmp906; in fftw_twiddle_64()
/dports/math/fftw-float/fftw-2.1.5/rfftw/
H A Dfcr_128.c224 fftw_real tmp906; in fftw_hc2real_128() local
1470 tmp906 = tmp837 + tmp836; in fftw_hc2real_128()
2468 tmp908 = tmp906 - tmp907; in fftw_hc2real_128()
2544 tmp941 = tmp906 + tmp907; in fftw_hc2real_128()
H A Dfrc_128.c2175 fftw_real tmp906; in fftw_real2hc_128() local
2233 tmp906 = tmp902 - tmp905; in fftw_real2hc_128()
2246 tmp907 = tmp899 + tmp906; in fftw_real2hc_128()
2265 tmp935 = tmp899 - tmp906; in fftw_real2hc_128()
/dports/math/fftw/fftw-2.1.5/fftw/
H A Dfn_64.c1489 fftw_real tmp906; in fftw_no_twiddle_64() local
1500 tmp906 = K707106781 * (tmp902 + tmp903); in fftw_no_twiddle_64()
1501 c_im(output[40 * ostride]) = tmp905 - tmp906; in fftw_no_twiddle_64()
1502 c_im(output[8 * ostride]) = tmp905 + tmp906; in fftw_no_twiddle_64()
H A Dfni_64.c1884 fftw_real tmp906; in fftwi_no_twiddle_64() local
1891 tmp906 = tmp901 - tmp898; in fftwi_no_twiddle_64()
1892 c_re(output[52 * ostride]) = tmp905 - tmp906; in fftwi_no_twiddle_64()
1893 c_re(output[20 * ostride]) = tmp905 + tmp906; in fftwi_no_twiddle_64()
H A Dftw_64.c2651 fftw_real tmp906; in fftw_twiddle_64() local
2658 tmp906 = tmp904 - tmp905; in fftw_twiddle_64()
2659 c_re(inout[54 * iostride]) = tmp903 - tmp906; in fftw_twiddle_64()
2660 c_re(inout[22 * iostride]) = tmp903 + tmp906; in fftw_twiddle_64()
H A Dftwi_64.c2655 fftw_real tmp906; in fftwi_twiddle_64() local
2662 tmp906 = tmp904 - tmp905; in fftwi_twiddle_64()
2663 c_re(inout[50 * iostride]) = tmp903 - tmp906; in fftwi_twiddle_64()
2664 c_re(inout[18 * iostride]) = tmp903 + tmp906; in fftwi_twiddle_64()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/
H A Dbig_alu.ll1222 %tmp906 = select i1 %tmp905, float 0x3FE99999A0000000, float %tmp904
1223 %tmp907 = fmul float %tmp8, %tmp906
1224 %tmp908 = fmul float %tmp13, %tmp906
1225 %tmp909 = fmul float %tmp18, %tmp906

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