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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/mlir/test/Dialect/Vector/
H A D	vector-transferop-opt.mlir	`4 // CHECK-NOT: vector.transfer_write 8 // CHECK: vector.transfer_write 31 // CHECK: vector.transfer_write 32 // CHECK: vector.transfer_write 36 // CHECK: vector.transfer_write 63 // CHECK: vector.transfer_write 69 // CHECK: vector.transfer_write 93 // CHECK: vector.transfer_write 101 // CHECK: vector.transfer_write 102 // CHECK-NOT: vector.transfer_write [all …]`
H A D	vector-transfer-unroll.mlir	27 // CHECK-NEXT: vector.transfer_write %[[S0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32>,… 29 // CHECK-NEXT: vector.transfer_write %[[S1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32>,… 31 // CHECK-NEXT: vector.transfer_write %[[S2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32>,… 33 // CHECK-NEXT: vector.transfer_write %[[S3]], {{.}}[%[[C2]], %[[C2]]] {{.}} : vector<2x2xf32>,… 38 vector.transfer_write %arg1, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 49 // CHECK-NEXT: vector.transfer_write %[[VTR0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32… 50 // CHECK-NEXT: vector.transfer_write %[[VTR1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32… 51 // CHECK-NEXT: vector.transfer_write %[[VTR2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32… 59 vector.transfer_write %0, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 99 %r = vector.transfer_write %arg1, %arg0[%c0, %c0] : [all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/mlir/test/Dialect/Vector/
H A D	vector-transferop-opt.mlir	`4 // CHECK-NOT: vector.transfer_write 8 // CHECK: vector.transfer_write 31 // CHECK: vector.transfer_write 32 // CHECK: vector.transfer_write 36 // CHECK: vector.transfer_write 63 // CHECK: vector.transfer_write 69 // CHECK: vector.transfer_write 93 // CHECK: vector.transfer_write 101 // CHECK: vector.transfer_write 102 // CHECK-NOT: vector.transfer_write [all …]`
H A D	vector-transfer-unroll.mlir	27 // CHECK-NEXT: vector.transfer_write %[[S0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32>,… 29 // CHECK-NEXT: vector.transfer_write %[[S1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32>,… 31 // CHECK-NEXT: vector.transfer_write %[[S2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32>,… 33 // CHECK-NEXT: vector.transfer_write %[[S3]], {{.}}[%[[C2]], %[[C2]]] {{.}} : vector<2x2xf32>,… 38 vector.transfer_write %arg1, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 49 // CHECK-NEXT: vector.transfer_write %[[VTR0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32… 50 // CHECK-NEXT: vector.transfer_write %[[VTR1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32… 51 // CHECK-NEXT: vector.transfer_write %[[VTR2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32… 59 vector.transfer_write %0, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 99 %r = vector.transfer_write %arg1, %arg0[%c0, %c0] : [all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/mlir/test/Dialect/Vector/
H A D	vector-transferop-opt.mlir	`4 // CHECK-NOT: vector.transfer_write 8 // CHECK: vector.transfer_write 31 // CHECK: vector.transfer_write 32 // CHECK: vector.transfer_write 36 // CHECK: vector.transfer_write 63 // CHECK: vector.transfer_write 69 // CHECK: vector.transfer_write 93 // CHECK: vector.transfer_write 101 // CHECK: vector.transfer_write 102 // CHECK-NOT: vector.transfer_write [all …]`
H A D	vector-transfer-unroll.mlir	27 // CHECK-NEXT: vector.transfer_write %[[S0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32>,… 29 // CHECK-NEXT: vector.transfer_write %[[S1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32>,… 31 // CHECK-NEXT: vector.transfer_write %[[S2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32>,… 33 // CHECK-NEXT: vector.transfer_write %[[S3]], {{.}}[%[[C2]], %[[C2]]] {{.}} : vector<2x2xf32>,… 38 vector.transfer_write %arg1, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 49 // CHECK-NEXT: vector.transfer_write %[[VTR0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32… 50 // CHECK-NEXT: vector.transfer_write %[[VTR1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32… 51 // CHECK-NEXT: vector.transfer_write %[[VTR2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32… 59 vector.transfer_write %0, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 99 %r = vector.transfer_write %arg1, %arg0[%c0, %c0] : [all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/mlir/test/Dialect/Vector/
H A D	vector-transferop-opt.mlir	`4 // CHECK-NOT: vector.transfer_write 8 // CHECK: vector.transfer_write 31 // CHECK: vector.transfer_write 32 // CHECK: vector.transfer_write 36 // CHECK: vector.transfer_write 63 // CHECK: vector.transfer_write 69 // CHECK: vector.transfer_write 93 // CHECK: vector.transfer_write 101 // CHECK: vector.transfer_write 102 // CHECK-NOT: vector.transfer_write [all …]`
H A D	vector-transfer-unroll.mlir	27 // CHECK-NEXT: vector.transfer_write %[[S0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32>,… 29 // CHECK-NEXT: vector.transfer_write %[[S1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32>,… 31 // CHECK-NEXT: vector.transfer_write %[[S2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32>,… 33 // CHECK-NEXT: vector.transfer_write %[[S3]], {{.}}[%[[C2]], %[[C2]]] {{.}} : vector<2x2xf32>,… 38 vector.transfer_write %arg1, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 49 // CHECK-NEXT: vector.transfer_write %[[VTR0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32… 50 // CHECK-NEXT: vector.transfer_write %[[VTR1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32… 51 // CHECK-NEXT: vector.transfer_write %[[VTR2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32… 59 vector.transfer_write %0, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 99 %r = vector.transfer_write %arg1, %arg0[%c0, %c0] : [all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/mlir/test/Dialect/Vector/
H A D	vector-transferop-opt.mlir	`4 // CHECK-NOT: vector.transfer_write 8 // CHECK: vector.transfer_write 31 // CHECK: vector.transfer_write 32 // CHECK: vector.transfer_write 36 // CHECK: vector.transfer_write 63 // CHECK: vector.transfer_write 69 // CHECK: vector.transfer_write 93 // CHECK: vector.transfer_write 101 // CHECK: vector.transfer_write 102 // CHECK-NOT: vector.transfer_write [all …]`
H A D	vector-transfer-unroll.mlir	26 // CHECK-NEXT: vector.transfer_write %[[T0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32>,… 28 // CHECK-NEXT: vector.transfer_write %[[T1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32>,… 30 // CHECK-NEXT: vector.transfer_write %[[T2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32>,… 32 // CHECK-NEXT: vector.transfer_write %[[T3]], {{.}}[%[[C2]], %[[C2]]] {{.}} : vector<2x2xf32>,… 37 vector.transfer_write %arg1, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 48 // CHECK-NEXT: vector.transfer_write %[[VTR0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32… 49 // CHECK-NEXT: vector.transfer_write %[[VTR1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32… 50 // CHECK-NEXT: vector.transfer_write %[[VTR2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32… 58 vector.transfer_write %0, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 97 %r = vector.transfer_write %arg1, %arg0[%c0, %c0] : [all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/mlir/test/Dialect/Vector/
H A D	vector-transferop-opt.mlir	`4 // CHECK-NOT: vector.transfer_write 8 // CHECK: vector.transfer_write 31 // CHECK: vector.transfer_write 32 // CHECK: vector.transfer_write 36 // CHECK: vector.transfer_write 63 // CHECK: vector.transfer_write 69 // CHECK: vector.transfer_write 93 // CHECK: vector.transfer_write 101 // CHECK: vector.transfer_write 102 // CHECK-NOT: vector.transfer_write [all …]`
H A D	vector-transfer-unroll.mlir	26 // CHECK-NEXT: vector.transfer_write %[[T0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32>,… 28 // CHECK-NEXT: vector.transfer_write %[[T1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32>,… 30 // CHECK-NEXT: vector.transfer_write %[[T2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32>,… 32 // CHECK-NEXT: vector.transfer_write %[[T3]], {{.}}[%[[C2]], %[[C2]]] {{.}} : vector<2x2xf32>,… 37 vector.transfer_write %arg1, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 48 // CHECK-NEXT: vector.transfer_write %[[VTR0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32… 49 // CHECK-NEXT: vector.transfer_write %[[VTR1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32… 50 // CHECK-NEXT: vector.transfer_write %[[VTR2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32… 58 vector.transfer_write %0, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 97 %r = vector.transfer_write %arg1, %arg0[%c0, %c0] : [all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/mlir/test/Dialect/Linalg/
H A D	transform-patterns-matmul-to-vector.mlir	15 // CHECK-1D: vector.transfer_write {{.}} : vector<8x16xf32>, memref<8x16xf32> 16 // CHECK-1D: vector.transfer_write {{.}} : vector<16x12xf32>, memref<16x12xf32> 17 // CHECK-1D: vector.transfer_write {{.}} : vector<8x12xf32>, memref<8x12xf32> 20 // CHECK-1D: vector.transfer_write {{.}} : vector<8x16xf32>, memref<8x16xf32, #{{.}}> 22 // CHECK-1D: vector.transfer_write {{.}} : vector<16x12xf32>, memref<16x12xf32, #{{.}}> 24 // CHECK-1D: vector.transfer_write {{.}} : vector<8x12xf32>, memref<8x12xf32, #{{.}}> 31 // CHECK-1D: vector.transfer_write {{.}} : vector<8x12xf32>, memref<8x12xf32, #{{.}}> 34 // CHECK-2D: vector.transfer_write {{.}} : vector<8x16xf32>, memref<8x16xf32> 35 // CHECK-2D: vector.transfer_write {{.}} : vector<16x12xf32>, memref<16x12xf32> 36 // CHECK-2D: vector.transfer_write {{.}} : vector<8x12xf32>, memref<8x12xf32>
H A D	hoisting.mlir	35 // CHECK: vector.transfer_write %{{.}} : vector<3xf32>, memref<?x?xf32> 36 // CHECK: vector.transfer_write %{{.}} : vector<4xf32>, memref<?x?xf32> 37 // CHECK: vector.transfer_write %{{.}} : vector<5xf32>, memref<?x?xf32> 41 // CHECK: vector.transfer_write %{{.}} : vector<2xf32>, memref<?x?xf32> 45 // CHECK: vector.transfer_write %{{.}} : vector<1xf32>, memref<?x?xf32> 64 vector.transfer_write %u1, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> 184 // CHECK: vector.transfer_write %{{.}} : vector<3xf32>, tensor<?x?xf32> 185 // CHECK: vector.transfer_write %{{.}} : vector<4xf32>, tensor<?x?xf32> 186 // CHECK: vector.transfer_write %{{.}} : vector<5xf32>, tensor<?x?xf32> 191 // CHECK: vector.transfer_write %{{.*}} : vector<2xf32>, tensor<?x?xf32> [all …]
H A D	vectorization.mlir	74 // CHECK: vector.transfer_write %{{.}}, %{{.}} : vector<8x32xf32>, memref<8x32xf32> 180 // CHECK: vector.transfer_write %[[V]], {{.}} : vector<8x16xf32>, memref<8x16xf32> 655 %2 = vector.transfer_write %1, %0[%c0, %c0] 684 %2 = vector.transfer_write %1, %0[%c0, %c0] 758 // CHECK: vector.transfer_write {{.}} : vector<4x16xf32>, tensor<4x16xf32> 819 // CHECK: vector.transfer_write {{.}} : vector<4xf32>, tensor<4xf32> 824 // CHECK: vector.transfer_write {{.}} : vector<4xf32>, tensor<4xf32> 844 // CHECK: vector.transfer_write {{.}} : vector<4xf32>, tensor<4xf32> 849 // CHECK: vector.transfer_write {{.}} : vector<4xf32>, tensor<4xf32> 877 // CHECK: %[[f:.*]] = vector.transfer_write %[[F0_v1]], %[[init]][] [all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/mlir/test/Dialect/Linalg/
H A D	hoisting.mlir	35 // CHECK: vector.transfer_write %{{.}} : vector<3xf32>, memref<?x?xf32> 36 // CHECK: vector.transfer_write %{{.}} : vector<4xf32>, memref<?x?xf32> 37 // CHECK: vector.transfer_write %{{.}} : vector<5xf32>, memref<?x?xf32> 41 // CHECK: vector.transfer_write %{{.}} : vector<2xf32>, memref<?x?xf32> 44 // CHECK: vector.transfer_write %{{.}} : vector<1xf32>, memref<?x?xf32> 62 vector.transfer_write %u1, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> 180 // CHECK: vector.transfer_write %{{.}} : vector<3xf32>, tensor<?x?xf32> 181 // CHECK: vector.transfer_write %{{.}} : vector<4xf32>, tensor<?x?xf32> 182 // CHECK: vector.transfer_write %{{.}} : vector<5xf32>, tensor<?x?xf32> 187 // CHECK: vector.transfer_write %{{.*}} : vector<2xf32>, tensor<?x?xf32> [all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/mlir/test/Dialect/Linalg/
H A D	hoisting.mlir	35 // CHECK: vector.transfer_write %{{.}} : vector<3xf32>, memref<?x?xf32> 36 // CHECK: vector.transfer_write %{{.}} : vector<4xf32>, memref<?x?xf32> 37 // CHECK: vector.transfer_write %{{.}} : vector<5xf32>, memref<?x?xf32> 41 // CHECK: vector.transfer_write %{{.}} : vector<2xf32>, memref<?x?xf32> 44 // CHECK: vector.transfer_write %{{.}} : vector<1xf32>, memref<?x?xf32> 62 vector.transfer_write %u1, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> 180 // CHECK: vector.transfer_write %{{.}} : vector<3xf32>, tensor<?x?xf32> 181 // CHECK: vector.transfer_write %{{.}} : vector<4xf32>, tensor<?x?xf32> 182 // CHECK: vector.transfer_write %{{.}} : vector<5xf32>, tensor<?x?xf32> 187 // CHECK: vector.transfer_write %{{.*}} : vector<2xf32>, tensor<?x?xf32> [all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/mlir/test/Dialect/Linalg/
H A D	hoisting.mlir	35 // CHECK: vector.transfer_write %{{.}} : vector<3xf32>, memref<?x?xf32> 36 // CHECK: vector.transfer_write %{{.}} : vector<4xf32>, memref<?x?xf32> 37 // CHECK: vector.transfer_write %{{.}} : vector<5xf32>, memref<?x?xf32> 41 // CHECK: vector.transfer_write %{{.}} : vector<2xf32>, memref<?x?xf32> 44 // CHECK: vector.transfer_write %{{.}} : vector<1xf32>, memref<?x?xf32> 62 vector.transfer_write %u1, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> 180 // CHECK: vector.transfer_write %{{.}} : vector<3xf32>, tensor<?x?xf32> 181 // CHECK: vector.transfer_write %{{.}} : vector<4xf32>, tensor<?x?xf32> 182 // CHECK: vector.transfer_write %{{.}} : vector<5xf32>, tensor<?x?xf32> 187 // CHECK: vector.transfer_write %{{.*}} : vector<2xf32>, tensor<?x?xf32> [all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/mlir/test/Dialect/Linalg/
H A D	hoisting.mlir	123 // VECTOR_TRANSFERS: vector.transfer_write %{{.}} : vector<2xf32>, memref<?x?xf32> 126 // VECTOR_TRANSFERS: vector.transfer_write %{{.}} : vector<1xf32>, memref<?x?xf32> 143 vector.transfer_write %u0, %memref1[%c0, %c0] : vector<1xf32>, memref<?x?xf32> 144 vector.transfer_write %u1, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> 145 vector.transfer_write %u2, %memref2[%c0, %c0] : vector<3xf32>, memref<?x?xf32> 146 vector.transfer_write %u3, %memref3[%c0, %c0] : vector<4xf32>, memref<?x?xf32> 147 vector.transfer_write %u4, %memref4[%c0, %c0] : vector<5xf32>, memref<?x?xf32> 148 vector.transfer_write %u5, %memref5[%c0, %c0] : vector<6xf32>, memref<?x?xf32> 221 vector.transfer_write %u00, %memref1[%c0, %c0] : vector<2xf32>, memref<?x?xf32> 227 vector.transfer_write %u10, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> [all …]
H A D	vectorization.mlir	71 // CHECK: vector.transfer_write %{{.}}, %{{.}} : vector<8x32xf32>, memref<8x32xf32> 90 // CHECK: vector.transfer_write %{{.}}, %{{.}} : vector<8x32xi32>, memref<8x32xi32> 109 // CHECK: vector.transfer_write %[[V]], {{.}} : vector<8x16xf32>, memref<8x16xf32> 125 // CHECK: vector.transfer_write %[[V]], {{.}} : vector<8x16xf32>, memref<8x16xf32> 202 // CHECK: vector.transfer_write %[[ADD]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 205 // CHECK: vector.transfer_write %[[DIV]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 206 // CHECK: vector.transfer_write %[[EXP]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 207 // CHECK: vector.transfer_write %[[MUL]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 209 // CHECK: vector.transfer_write %[[SEL]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 210 // CHECK: vector.transfer_write %[[SUB]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… [all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/mlir/test/Dialect/Linalg/
H A D	hoisting.mlir	123 // VECTOR_TRANSFERS: vector.transfer_write %{{.}} : vector<2xf32>, memref<?x?xf32> 126 // VECTOR_TRANSFERS: vector.transfer_write %{{.}} : vector<1xf32>, memref<?x?xf32> 143 vector.transfer_write %u0, %memref1[%c0, %c0] : vector<1xf32>, memref<?x?xf32> 144 vector.transfer_write %u1, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> 145 vector.transfer_write %u2, %memref2[%c0, %c0] : vector<3xf32>, memref<?x?xf32> 146 vector.transfer_write %u3, %memref3[%c0, %c0] : vector<4xf32>, memref<?x?xf32> 147 vector.transfer_write %u4, %memref4[%c0, %c0] : vector<5xf32>, memref<?x?xf32> 148 vector.transfer_write %u5, %memref5[%c0, %c0] : vector<6xf32>, memref<?x?xf32> 221 vector.transfer_write %u00, %memref1[%c0, %c0] : vector<2xf32>, memref<?x?xf32> 227 vector.transfer_write %u10, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> [all …]
H A D	vectorization.mlir	71 // CHECK: vector.transfer_write %{{.}}, %{{.}} : vector<8x32xf32>, memref<8x32xf32> 90 // CHECK: vector.transfer_write %{{.}}, %{{.}} : vector<8x32xi32>, memref<8x32xi32> 109 // CHECK: vector.transfer_write %[[V]], {{.}} : vector<8x16xf32>, memref<8x16xf32> 125 // CHECK: vector.transfer_write %[[V]], {{.}} : vector<8x16xf32>, memref<8x16xf32> 202 // CHECK: vector.transfer_write %[[ADD]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 205 // CHECK: vector.transfer_write %[[DIV]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 206 // CHECK: vector.transfer_write %[[EXP]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 207 // CHECK: vector.transfer_write %[[MUL]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 209 // CHECK: vector.transfer_write %[[SEL]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… 210 // CHECK: vector.transfer_write %[[SUB]], %[[ARG0]][%[[C0]], %[[C0]]] {{.}} : vector<4x256… [all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/mlir/test/Dialect/Vector/
H A D	vector-transfer-unroll.mlir	26 // CHECK-NEXT: vector.transfer_write %[[T0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32>,… 28 // CHECK-NEXT: vector.transfer_write %[[T1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32>,… 30 // CHECK-NEXT: vector.transfer_write %[[T2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32>,… 32 // CHECK-NEXT: vector.transfer_write %[[T3]], {{.}}[%[[C2]], %[[C2]]] {{.}} : vector<2x2xf32>,… 37 vector.transfer_write %arg1, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32> 48 // CHECK-NEXT: vector.transfer_write %[[VTR0]], {{.}}[%[[C0]], %[[C0]]] {{.}} : vector<2x2xf32… 49 // CHECK-NEXT: vector.transfer_write %[[VTR1]], {{.}}[%[[C0]], %[[C2]]] {{.}} : vector<2x2xf32… 50 // CHECK-NEXT: vector.transfer_write %[[VTR2]], {{.}}[%[[C2]], %[[C0]]] {{.}} : vector<2x2xf32… 51 // CHECK-NEXT: vector.transfer_write %[[VTR3]], {{.}}[%[[C2]], %[[C2]]] {{.}} : vector<2x2xf32… 58 vector.transfer_write %0, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32>
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/mlir/test/Dialect/Linalg/
H A D	hoisting.mlir	123 // VECTOR_TRANSFERS: vector.transfer_write %{{.}} : vector<2xf32>, memref<?x?xf32> 126 // VECTOR_TRANSFERS: vector.transfer_write %{{.}} : vector<1xf32>, memref<?x?xf32> 143 vector.transfer_write %u0, %memref1[%c0, %c0] : vector<1xf32>, memref<?x?xf32> 144 vector.transfer_write %u1, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> 145 vector.transfer_write %u2, %memref2[%c0, %c0] : vector<3xf32>, memref<?x?xf32> 146 vector.transfer_write %u3, %memref3[%c0, %c0] : vector<4xf32>, memref<?x?xf32> 147 vector.transfer_write %u4, %memref4[%c0, %c0] : vector<5xf32>, memref<?x?xf32> 148 vector.transfer_write %u5, %memref5[%c0, %c0] : vector<6xf32>, memref<?x?xf32> 221 vector.transfer_write %u00, %memref1[%c0, %c0] : vector<2xf32>, memref<?x?xf32> 222 vector.transfer_write %u01, %memref1[%c0, %c1] : vector<2xf32>, memref<?x?xf32> [all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/mlir/test/Dialect/Linalg/
H A D	hoisting.mlir	123 // VECTOR_TRANSFERS: vector.transfer_write %{{.}} : vector<2xf32>, memref<?x?xf32> 126 // VECTOR_TRANSFERS: vector.transfer_write %{{.}} : vector<1xf32>, memref<?x?xf32> 143 vector.transfer_write %u0, %memref1[%c0, %c0] : vector<1xf32>, memref<?x?xf32> 144 vector.transfer_write %u1, %memref0[%i, %i] : vector<2xf32>, memref<?x?xf32> 145 vector.transfer_write %u2, %memref2[%c0, %c0] : vector<3xf32>, memref<?x?xf32> 146 vector.transfer_write %u3, %memref3[%c0, %c0] : vector<4xf32>, memref<?x?xf32> 147 vector.transfer_write %u4, %memref4[%c0, %c0] : vector<5xf32>, memref<?x?xf32> 148 vector.transfer_write %u5, %memref5[%c0, %c0] : vector<6xf32>, memref<?x?xf32> 221 vector.transfer_write %u00, %memref1[%c0, %c0] : vector<2xf32>, memref<?x?xf32> 222 vector.transfer_write %u01, %memref1[%c0, %c1] : vector<2xf32>, memref<?x?xf32> [all …]

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